Product category: Design and Development Software
News Release from: Zenasis Technologies | Subject: ZenTime-GT, ZenTime-AT and ZenTime-PT
Edited by the Electronicstalk Editorial Team on 28 March 2006
Hybrid optimisation resolves ASIC design
conflicts
Software automates standard cell design optimisation for timing, area and leakage power, accelerating design closure for high-speed standard cell designs.
Zenasis Technologies has expanded its series of ZenTime products: ZenTime-GT, ZenTime-AT and ZenTime-PT automate standard cell design optimisation for timing, area and leakage power, respectively, accelerating design closure for high-speed standard cell designs Timing closure continues to be a challenge with high performance standard cell designs; leakage power is increasing exponentially in nanometre designs and can no longer be ignored
This article was originally published on Electronicstalk on 14 Apr 2004 at 8.00am (UK)
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