Product category: Intellectual Property Cores
News Release from: True Circuits | Subject: PLL hard macros
Edited by the Electronicstalk Editorial Team on 25 April 2006
Soft modem chip integrates many PLLs
Multiple PLL hard macros have been used by fabless semiconductor company Icera in the Livanto ICE8020 wireless soft modem IC for 3G mobile phone and wireless devices
Multiple instances of True Circuits' phase-locked loop (PLL) hard macros have been used by fabless semiconductor company Icera in the Livanto ICE8020 wireless soft modem IC for 3G mobile phone and wireless devices. Based on the world's highest performance generic wireless processor, Icera's Deep eXecution Processor (DXP), Livanto is fabricated in TSMC's 90nm process technology.
This article was originally published on Electronicstalk on 25 April 2006 at 8.00am (UK)
Related stories
PLL hard macros save die space
A new line of phase-locked loop (PLL) hard macros from True Circuits occupy just one-third the die size of the company's current standard PLL products
Wireless network processor applies multiple PLLs
Ubicom has successfully implemented multiple True Circuits PLL hard macros in its IP3023T wireless network processor using TSMC's 130nm process technology
The True Circuits PLLs are being used as part of the processors' central-clocking system to provide frequency modulation and high frequency resolution with low long-term jitter.
'The Livanto wireless-soft modem is targeted at next generation mobile phones and high performance wireless applications, plus it is fabricated in a 90nm process, so we spent a fair amount of time selecting suitable IP and designing the best clocking system possible', said Peter Hughes, Vice President of Silicon Operations.
'True Circuits' IP gave us high implementation flexibility and provided us with the functionality we required, while meeting our strict power, area and cost targets'.
'We are pleased to be working with companies like Icera, who are developing innovative technologies for high performance wireless applications', said Stephen Maneatis, True Circuits' CEO.
'Their selection of our popular clock-generator PLL is another validation of our IP's suitability for high performance, high volume applications'.
• True Circuits: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• NEW
• Electronicstalk Home Page
Related Business News
Cast Selects Avery Design Systems For...
...Pci Express Verification Ip. Semiconductor intellectual property provider CAST, Inc. today announced that it has begun using the PCI-Xactor test environment from Avery Design Systems to verify its current and future PCI Express IP cores.
Vsia Announces Release Of Qip Metric...
...Now Publicly Available With Hard Ip Extension. The VSI Alliance , the leading IP standards body for the electronics industry, today announced the Quality IP Metric version 3.0, which includes the hard IP extension, is now publicly available.
Gda Technologies Selected By Renesas Technology...
...For Pci Express To Amba Axi Bridge. Gda Technologies, Inc., a fast growing supplier of Intellectual Property and Electronic Design Services , today announced that Renesas Technology Corp., a leading semiconductor company, has selected GDA for development of a PCIE 2 AMBA AXI Bridge to be
Altera delivers first FPGA-Based IP support for Ethernet protocols
Bangalore, India: Altera Corp. has announced FPGA-based support for Ethernet communications protocols used in industrial automation applications, including ProfiNet, Ethernet/IP, Modbus-IDA, EtherCAT, SERCOS III Interface, and Ethernet Powerlink.
Ieee Picks Up Vsia's Standards Work
The IEEE has formed two study groups to explore the creation of IEEE standards based on work done at the VSI Alliance.