News Release from: True Circuits
Edited by the Electronicstalk Editorial Team on 14 October 2003
Low-jitter DLL macros target DDR interfaces
A new line of delay-locked loop analogue hard macros is aimed at high-speed, DDR-style interface applications.
Note: Readers of the Editor’s free email newsletter will have read this news when it was announced. . It’s free!
A new line of delay-locked loop (DLL) analogue hard macros is aimed at high-speed, DDR-style interface applications. The True Circuits DDR DLL is very flexible because it is programmable. It is a silicon-proven, low-jitter hard macro that generates precise strobe signal delays that can be programmed from 0 to 360 degrees of the reference period.
It is designed to delay multiple periodic or aperiodic signals independent of voltage and temperature and deliver optimal jitter performance over a wide frequency range with good linearity and resolution.
"Our high-performance DDR DLL is another example of a hard macro we have specifically developed for circuit designers in need of an accurate and flexible timing solution, in this case, for DDR style memory interface applications", noted Dr John Maneatis, True Circuits' President.
"This DDR DLL has been successfully implemented in combination with our clock generator PLL, providing our customers with a powerful timing solution whereby they can programmably target different speed memories with optimal interface timing".
True Circuits' DDR DLL uses a reference clock to establish a timebase in order to delay arbitrary strobe signals by precise fractions of the clock cycle.
It uses an analogue delay line that is phase-locked to be insensitive to temperature or supply voltage and setup with very high supply noise rejection.
The block can be configured by TCI to have just about any number of slaves (which delay the arbitrary signals) with a single master section to minimise area and power.
The slave delays can be set to particular values or dynamically adjusted after determining the boundaries of a data eye.
True Circuits DLLs are available for immediate customer delivery in TSMC, UMC and Chartered processes from 0.25 to 0.09 micron.
The hard macros are available for a per use licence fee with no royalty fees.
The licence fee includes integration support from TCI to ensure a successful customer tape out.
The deliverables include GDSII and LVS Spice netlists, Verilog and synthesis models, Library Exchange Format (LEF) files and extensive user documentation.
• True Circuits: contact details and other news
• Other news in Intellectual Property Cores
• Email this news to a colleague
•
• RSS news feed for True Circuits
• RSS news feed for Intellectual Property Cores
• Electronicstalk Home Page
Copyright © 2000-2006 Pro-Talk Ltd, UK. Based on news supplied by True Circuits - Subject: DDR DLL macros