Product category: Microprocessors, Microcontrollers and DSPs
News Release from: Toshiba Electronics Europe | Subject: TX9956CXBG
Edited by the Electronicstalk Editorial Team on 9 July 2004
64bit RISC processor
eyes multifunction market
The TX9956CXBG is the first standard 64bit microprocessor to employ the high-performance TX99/H4 CPU core and industry-leading 90nm process technology
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The TX9956CXBG device is the first standard 64bit microprocessor to employ the high-performance TX99/H4 CPU core and industry-leading 90nm process technology. With 533 to 666MHz maximum operating frequency, the new TX9956CXBG is currently the highest-performance microprocessor in the TX System RISC general-purpose product line.
It is targeted at diverse applications, including multifunction printers and high-end set-top boxes.
"With the introduction of the TX9956CXBG, Toshiba continues to grow its bus-compatible, general-purpose microprocessor portfolio to provide scalability and higher performance to customers", said Peter Lieberwirth, General Manager for Microcomputer, Automotive and Consumer IC Marketing at Toshiba Electronics Europe.
"Our multifunction printer, high-end set-top box and other customers can upgrade to the TX9956CXBG from existing, lower-frequency processors while keeping the same companion ASICs or off-the-shelf SysAD-compatible chipsets".
Further reading
Trident displays expertise in Nordic sales
Toshiba Electronics Europe has presented an award for 'outstanding business development in 2006' to Trident Displays in the Nordic region
Diodes protect data ports
The DF2S6.8UFS electrostatic discharge protection diode is the first ultra low capacitance diode from Toshiba
"This reduces time to market for system introduction".
Based on the MIPS64 architecture of MIPS Technologies, the new true 64bit microprocessor features the high-performance 64bit RISC TX99/H4 core and includes both the industry-leading 64bit MIPS64 instruction-set architecture (ISA) for speed and the MIPS-3D Application-specific extension (ASE).
The latter is an instruction set that achieves high-performance 3D geometry processing in digital entertainment and multimedia products.
The highly optimised seven-stage, dual-issue, superscalar pipeline architecture was developed jointly by MIPS and Toshiba.
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