Product category: Microprocessors, Microcontrollers and DSPs
News Release from: Toshiba Electronics Europe | Subject: MeP
Edited by the Electronicstalk Editorial Team on 24 February 2004
Multimedia processor gains reconfigurable benefits
Toshiba and Elixent have demonstrated a prototype of a low-power, high-performance SoC RISC processor that facilitates the complete reconfiguration of multimedia applications in the field
The ET1 configurable media processor brings together Toshiba's open and scalable Media embedded Processor (MeP) architecture and Elixent's patented Reconfigurable Algorithm Processing (RAP) technology for the first time. The ability to completely reconfigure multimedia applications after production and on through operating life offers a number of advantages ranging from bug fixes and upgrades to the complete modification of application functionality.
This article was originally published on Electronicstalk on 24 February 2004 at 8.00am (UK)
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Using reconfigurable media processors also allows OEMs to use a single configurable IC platform across a range of products, with exact product functionality or regional variations dictated by the specific configuration of the processor.
Based on Toshiba's 32bit MeP-c2 core, the MeP architecture is designed to reduce the cost, power consumption, die size and development time of SoC implementations that require digital media processing such as video, image processing, audio and networking functionality.
Elixent's D-Fabrix RAP technology provides SoC designers with a flexible alternative to fixed function chips but without the power consumption levels typically associated with programmable technologies.
By combining MeP with D-Fabrix, Toshiba and Elixent have been able to produce a MeP module that combines the benefits of high performance, low power and low area overheads with full, post-fabrication reconfigurability.
The MeP platform offers a powerful, integrated hardware and software development environment that facilitates customised configurations and extensions of the basic MeP processor core.
Using this environment, Elixent has been able to tightly couple a D-Fabrix array with the MeP core using the core's DSP interface.
The resulting IC has been fabricated using Toshiba's 0.13um process.
The new ET1 IC has been configured as an MP3 reference model that can be used to demonstrate the performance, size, power and configurability benefits of the integrated Toshiba and Elixent technology.
However, the device is equally suited to other multimedia algorithms such as MPEG-4 or DTV frame interpolation.
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