Product category: ATE Systems
News Release from: Teradyne | Subject: J973EP VLSI test system
Edited by the Electronicstalk Editorial Team on 04 May 2001
Improved performance for VLSI and SoC
testing
The Teradyne J973EP VLSI test system made its first appearance in Europe at Semicon Europa.
The Teradyne J973EP VLSI test system made its first appearance in Europe at Semicon Europa The J973EP structural to full-performance test system includes technology breakthroughs such as quad-site testing of a system-on-chip (SoC) device and industry firsts for high-performance device manufacturers with demonstrations of new memory test, mixed-signal, and high-current voltage source options
This article was originally published on Electronicstalk on 15 Nov 2007 at 8.00am (UK)
Related stories
In-circuit tester handles two PCBs at once
Manufacturers can perform simultaneous testing of two PCBs, effectively doubling their test throughput without doubling capital equipment costs.
Software environment speeds test program debug
New from Teradyne, Debug Pro is a user-friendly software debug environment for TestStation ICT equipment.
The expanded performance of the J973EP, with Real Time Enabling, provide