Product category: Design and Development Software
News Release from: Synopsys | Subject: Galaxy
Edited by the Electronicstalk Editorial Team on 30 April 2004
Toshiba tapes out multiple 90nm SoC
designs
Toshiba Corp has taped out multiple 90nm SoC designs for its audiovisual and office equipment product lines using the Synopsys Galaxy design platform.
Toshiba Corp has taped out multiple 90nm SoC designs for its audiovisual and office equipment product lines using the Synopsys Galaxy design platform The designs were created using Design Compiler and DesignWare Library for synthesis, Power Compiler for dynamic and leakage power optimisation, Physical Compiler and Astro for physical implementation, PrimeTime for delay calculation/static timing signoff, Star-RCXT for full-chip parasitic extraction signoff, and DFT Compiler SoCBIST for test
This article was originally published on Electronicstalk on 5 Feb 2003 at 8.00am (UK)