Product category: Design and Development Software
News Release from: Synplicity | Subject: Synplify Premier 9.0
Edited by the Electronicstalk Editorial Team on 28 January 2008
Software receives FPGA optimisation
Synplify Premier 9.0 gives users accurate timing information and insight into debug performance-related issues immediately after synthesis.
Synplicity's Synplify Premier software has been enhanced to provide more time to market benefits to designers using high-density FPGAs In release 9.0, the graph-based physical synthesis technology has been optimised for Xilinx Virtex-5 FPGAs to deliver exceptional timing closure, analysis and debug for these devices
This article was originally published on Electronicstalk on 8 Jun 2001 at 8.00am (UK)
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Synplicity has highlighted details of a second-generation physical synthesis technology for programmable logic designers, the first such technology in the industry
This latest release extends the graph-based physical synthesis technology which has been implemented for Xilinx Spartan-3, Virtex-II Pro and Virtex-4 FPGAs for more than two years.
Synplicity has extended these benefits to FPGA designers targeting Altera Stratix-III, Stratix-II and Stratix-II GX FPGAs, through the company's Synplify Premier Beta programme.
Synplify Premier 9.0 gives users accurate timing information and insight into debug performance-related issues immediately after synthesis.
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