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News Release from: NXP (formerly Philips Semiconductors) | Subject: CMOS090LP
Edited by the Electronicstalk Editorial Team on 11 May 2004

Successful debut for 90nm SoC process

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Philips is claiming a significant milestone in putting 90nm CMOS chips into production by achieving right-first-time silicon from its CMOS production line at the Crolles2 wafer fab in France

Philips is claiming a significant milestone in putting 90nm CMOS chips into production by achieving right-first-time silicon from its CMOS production line at the Crolles2 wafer fab in Crolles, France and from TSMC's wafer fab in Taiwan. The Philips CMOS090LP is one of the world's first system-on-chip solutions to be fabricated in a low-leakage 90nm CMOS process.

This commercially targeted lead silicon integrates an ARM processor core with SRAM, ROM and analogue signal circuitry designed for a wireless application.

The low-leakage 90nm CMOS process has been specially developed by Philips and its Crolles2 alliance partners, Motorola and STMicroelectronics.

It gives designers the option of thicker gate oxide to control leakage currents, and allows OEMs to benefit from the smaller chip size associated with advanced process technologies while still meeting critical power consumption requirements.

As far as active power consumption for digital circuitry is concerned, the CMOS090LP process achieves typical power savings of 75% compared with a 0.18um CMOS implementation.

In terms of the silicon area occupied by digital circuitry, it offers up to four times reduction.

"As a company that relies heavily on low power consumption and mixed analogue/digital solutions to meet the performance requirements of tomorrow's portable multimedia consumer products, I am extremely proud of the fact that the first batch of Philips wafers from Crolles2 yielded right-first-time products", said Theo Claasen, Executive Vice President, Technology and Strategy, Philips Semiconductors.

"In addition to achieving right-first-time silicon, one of the most satisfying results is that we are seeing consistent performance between devices produced in the Crolles2 fab and those that have come from the TSMC fab", said Jan-Marc Luchies, 90nm CMOS Programme Manager, Philips Semiconductors.

"This means that the early work done by the Crolles2 partners and TSMC in aligning the processes at the two fabs, both in terms of design rules and electrical parameters, has really paid off".

This first product has also proven the design environment for the CMOS090LP process, allowing Philips to exactly meet its chip design schedule right up to tapeout.

Several other products benefiting from this success are expected to come out of the fab soon.

Achieving right-first-time silicon in the first half of 2004 means Philips is on track to deliver production volumes of 90nm CMOS products this year.

The success of this project confirms Philips' position is squarely in line with the International Technology Roadmap for Semiconductors (ITRS).

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