News Release from: PolarFab
Edited by the Electronicstalk Editorial Team on 9 June 2003

Kits speed power device design

PolarFab and Silvaco have developed process design kits for PolarFab's BP30 30V complementary bipolar process supporting Silvaco circuit simulation and custom IC CAD tools.

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PolarFab and Silvaco have developed process design kits (PDKs) for PolarFab's BP30 30V complementary bipolar process supporting Silvaco circuit simulation and custom IC CAD tools. "The Silvaco custom IC CAD design tools provide a solid platform for our customers to design power ICs with PolarFab's BP30 process", said Steve Kosier, Vice President of Engineering, PolarFab. "This process design kit includes parameterised cells for all active and passive components to increase the productivity of analogue designers.

Silvaco DRC and LVS rule decks support the wide variety of circuit elements required for analogue IC power applications".

"We appreciate PolarFab supporting our design flow with complete process design kits", said Mike Wilson, Vice President of Telecom and Computing Products, Power Management at Semtech.

"With these foundry supported PDKs, we are seeing immediate productivity from our engineers in design entry, simulation and design verification, shortening our design to tapeout cycle".

"PolarFab is a recognised leader in analogue and mixed-signal IC foundry with its bipolar and BiCMOS processes, and has been a leader for well over a quarter of a century", said Kenneth Brock, vice president of marketing for Silvaco.

"With the delivery of Silvaco PDKs, PolarFab demonstrates again its broad support of customers' choice in industry-leading EDA design tools".

PolarFab offers a broad range of high performance bipolar and BiCMOS processes and wafer manufacturing technologies for analogue and mixed-signal products.

Geometries range from 1.25 to 4um for bipolar processes and from 0.35 to 1.5um for BiCMOS and DMOS processes.

Silvaco analogue design kits enable designers to exploit the capabilities of PolarFab's advanced semiconductor processes in the early design stages.

Accurate and reliable Spice parameters and models are the first and most critical step to achieving first-time correct silicon, shorter design times, optimum semiconductor performance, lower development costs, reduced risks and ultimately faster time to market.

Schematic symbols, rule files and layout technology files enable immediate designer productivity when using a new silicon process.

The kit, which includes SmartSpice models, Scholar schematic symbols, Guardian DRC and LVS rule decks and parameterised cells for the PolarFab BP30 bipolar process, is available from PolarFab.

Design kits for PBC4, PolarFab's premier process for power management applications combining BiCMOS and DMOS, are in beta test and will be released in July 2003.

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