Product category: Standard Logic Devices
News Release from: National Semiconductor | Subject: LMK01000, LMK01010 and LMK01020 clock buffers
Edited by the Electronicstalk Editorial Team on 31 March 2008
Clock buffers cut system noise
The LMK01000, LMK01010 and LMK01020's low additive jitter allows system designers to distribute multiple copies of a clean clock, while maintaining clock integrity.
National Semiconductor has released three low-noise clock buffers, dividers and distributors that simplify system clock design while providing an additive noise of 30fs of additive root means square (RMS) jitter The LMK01000, LMK01010 and LMK01020 divide and distribute low-jitter clocks throughout high-performance systems such as wireless infrastructure, test and measurement and medical ultrasound and imaging
This article was originally published on Electronicstalk on 5 Jan 2001 at 8.00am (UK)
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The LMK01000 has a mix of three low-voltage differential signaling (LVDS) and five low-voltage positive-emitter-coupled logic (LVPECL) outputs.
The LMK01010 is offered with eight LVDS outputs to address low-power applications; and the LMK01020 has eight LVPECL outputs to support ultra high-performance applications.
The devices' low additive jitter allows system designers to distribute multiple copies of a clean clock (while maintaining clock integrity) and eliminates the need for additional jitter cleaning components.
Each device's output offers a programmable skew control circuit that simplifies board layout, enabling the designer to adjust the skew of each clock output and compensate for board trace mismatch.
The LMK01000, LMK01010 and LMK01020 ultra low-noise clock buffers, dividers and distributors are pin and footprint-compatible with National's LMK02000 and LMK03000 family of precision clock conditioners.
They join the recently released LMK03000D and LMK03001D low-jitter precision clock conditioners aimed at high-performance applications.
National's precision clock conditioner family is available in four pin-compatible performance grades, allowing flexible system design using one PC board layout.
The LMK01000, LMK01010 and LMK01020 ultra low-noise clock buffers, dividers and distributors provide 1.6GHz operation with low additive RMS jitter of 30fs.
Each individual clock output features an independently programmable divider and skew control circuit.
These features allow the distribution of eight frequencies at eight skew relationships.
The output of the dividers can be synchronised by an external pin.
The LMK010x0 family of devices has two separate clock inputs with a user programmable mux for selection between two different clock domains.
National offers these devices in 48-pin LLP packages.
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