Product category: Analogue and Mixed Signal ICs
News Release from: National Semiconductor | Subject: ADC08D1000WG-QV
Edited by the Electronicstalk Editorial Team on 30 January 2007
Frugal ADC meets space-grade
specifications
Low-power 8bit 1Gsample/s dual CMOS analogue-to-digital convertor is qualified for use in broadband and high-speed communications satellite applications.
National Semiconductor has announced the industry's lowest-power 8bit 1Gsample/s dual CMOS analogue-to-digital convertor (ADC) qualified for use in broadband and high-speed communications satellite applications Packaged in a 128-lead multilayered ceramic quad flat package, the ADC08D1000WG-QV consumes significantly less power than competitive products, while providing the gigahertz speed and greater effective number of bits (ENOB) necessary for reliable measurement of high-frequency signals
This article was originally published on Electronicstalk on 5 Jan 2001 at 8.00am (UK)
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The ADC08D1000WG-QV meets the industry's stringent space-grade specifications, including radiation levels of 120MeV for single event latch- up (SEL) and 300krad (Si) for total ionising dose.
As one of the key signal- path building blocks in communication satellite systems, this ADC delivers superior signal-to-noise and distortion performance at the lowest power in the industry to accurately capture real-world analogue transmissions and convert them for processing in the digital domain.
The ADC08D1000WG-QV digitises two input signals to 8bit resolution at sampling rates up to 1.2Gsample/s, while consuming just 800mW per channel from a 1.9V nominal supply.
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By using an innovative fully programmable dual-edge sampling feature, the product can achieve 2Gsample/s sampling from one channel by interleaving the two on-chip convertors.
Each ADC has a 1:2 demultiplexer that feeds two low-voltage differential signalling (LVDS) buses.
This reduces the output datarate on each bus to half the sampling rate.
National's ADC08D1000WG-QV has a unique, performance-enhancing flash- folding/interpolating architecture.
Folding reduces the number of comparators, and interpolation greatly reduces the number of front-end amplifiers, which provides a significant power savings and reduces the load on the input signal.
At a 1GHz sampling rate, the ADC08D1000WG-QV achieves 0.15 least significant bits (LSB) differential nonlinearity (DNL), while maintaining a high 7.4 ENOB at an input frequency of 498MHz (Nyquist).
The convertor is designed with an extremely low bit-error rate (BER) of 10e-18 and typically consumes less than 3.5mW in the power-down mode.
The ADC08D1000WG-QV guarantees "no missing codes" over the extended operating temperature range of -55 to +125C.
The ADC08D1000WG-QV has an on-command calibration mode to prevent single event effects (SEE) from triggering unwanted calibrations.
These features enable the product's high level of performance and accuracy in space-grade applications.
The ADC08D1000WG-QV is available now in a 128-lead multilayer ceramic quad flat package.
It is space-grade qualified to MIL-STD-38535 QML level V and can be purchased as the standard military drawing (SMD) 5962-0520601VZC.
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