Product category: Microprocessors, Microcontrollers and DSPs
News Release from: Freescale Semiconductor | Subject: Multicore Communications Platform
Edited by the Electronicstalk Editorial Team on 27 June 2007
Multicore platform promises network transformation
Innovative multicore architecture delivers breakthrough efficiencies, performance and scale, while addressing the emerging challenges of multicore software development
Freescale Semiconductor has unveiled its Multicore Communications Platform, an innovative multicore architecture that delivers breakthrough efficiencies, performance and scale, while addressing the emerging challenges of multicore software development. Fundamental to Freescale's new approach are the power reduction and integration advantages realised by a migration to 45nm process technology.
This article was originally published on Electronicstalk on 27 June 2007 at 8.00am (UK)
Related stories
8 and 32bit MCUs are pin-for-pin compatible
The first two members of the Flexis series of microcontrollers aid design migration from 8 to 32bit with a common set of on-chip peripherals and development tools
Analogue devices address automotive demands
Growing portfolio of analogue products for high-current powertrain applications includes output drivers, signal monitoring and conditioning devices, and H-bridges
Consumer and business demand for new services and rich content is stretching network capacity everywhere.
Meanwhile, incremental semiconductor product innovation is not sufficient to keep pace.
Equipment manufacturers are looking for new processing solutions that enable the creation of long-lived, software-oriented platforms that give service providers the agility to quickly introduce new services over converged networks.
Freescale's new platform addresses this trend by fulfilling the promise of embedded multicore technology and establishing pragmatic new approaches to transforming the world's networks.
'Our new platform goes beyond simply adding more cores on a chip'.
Further reading
More options for magnetoresistive RAM
New devices include extended temperature range nonvolatile RAM targeting rugged application environments, such as industrial, military, aerospace and automotive designs
Slimline accelerometer aids handset integration
Three-axis digital-output accelerometer is claimed to be 77% smaller than previous industry offerings
COM Express module hosts network development
All-in-one platform for industrial markets leverages Power Architecture technology in the COM Express form factor
'This is a comprehensive SoC architecture based on a cache-coherent and extensively scalable approach to multicore design', says Lynelle McKay, Senior Vice President and General Manager for Freescale's Networking and Computing Systems Group.
'We believe this platform and its ecosystem of enablement will unlock the real potential of multicore processing, establish new industry benchmarks for total networking performance and dramatically streamline multicore development'.
The Multicore Communications Platform is designed to help customers more easily migrate to multicore environments while preserving the value of legacy software investments.
This is made possible by Freescale's rich heritage in developing a broad range of compatible processors based on Power Architecture technology and the robust ecosystem of Power Architecture silicon enablement.
At the heart of the platform is CoreNet technology, a highly scalable fabric for on-chip connectivity.
It is designed to eliminate bus contention, bottlenecks and latency issues associated with shared bus/shared memory architectures that are common in other multicore approaches.
CoreNet technology can seamlessly accommodate more than 32 cores as well as heterogeneous core implementations.
The move to 45nm technology for this new multicore platform enables dramatic performance, integration and power efficiency enhancements designed to outpace Moore's Law and advance the state of embedded computing.
For example, at 45nm geometries, Freescale is able to engineer a multilevel, cache-coherent hierarchy that endows each core with its own L2 cache while also integrating multi megabytes of shared L3 cache.
Freescale's multicore platform includes an enhanced Power Architecture e500-mc core, based on the e500 core, targeting a top frequency of 1.5GHz.
It also integrates proven on-demand application acceleration capabilities such as new data path resource management technology that handles intrachip message passing and memory buffer reservation.
To enable safe and autonomous operation, the platform leverages a Hypervisor environment that enables multiple individual operating systems to share system resources, including processor cores, memory and other on-chip functions.
'Rather than throwing a bunch of low-performance CPUs together, Freescale is combining several powerful e500 CPUs in a single device', says Linley Gwennap, Principal Analyst of The Linley Group.
'Using its system-on-a-chip experience, Freescale then adds a high-speed fabric, offload of critical functions and intelligent I/O.
This combination will keep the CPUs operating at a high level of efficiency'.
To streamline and speed application development on the platform, Freescale is working with virtualised software development firm Virtutech to create a hybrid simulation environment that combines Virtutech's fast functional technology, called Simics, with a Freescale cycle-accurate model of the platform.
This environment is designed to enable developers to quickly switch between models for accurate performance prediction and accelerated development.
Virtutech offers Freescale customers and partners a virtualised software development platform that provides a controlled, deterministic and fully reversible environment for the development, debugging and benchmarking of software for complex multicore-based architectures.
The Simics environment allows developers to migrate and partition operating systems and applications onto the virtualised multicore platform well ahead of silicon availability and without real-world hardware constraints.
Freescale is engineering capabilities into the Multicore Communications Platform to enable advanced debugging while working in tandem with its ecosystem partners to assure availability of tools that can take advantage of these features.
These capabilities include integrated instruction trace, watchpoint triggers, cross event triggers, performance monitoring and other debug features as defined by the Power ISA.
These features enable dynamic debug essential for providing visibility into complex interactions that may occur among tasks running on different cores.
Freescale expects to roll out a comprehensive roadmap of products based on the new Multicore Communications Platform, the first of which is planned to sample in late 2008.
A Virtutech simulation environment is now available for Freescale's current generation of multicore processors, the MPC8572E and the MPC8641D.
The simulation environment for the platform is expected to be available in Q4 2007, allowing development and system optimisation to begin prior to product availability.
• Freescale Semiconductor: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• Electronicstalk Home Page
Search the Pro-Talk network of sites
