Product category: Design and Development Software
News Release from: Monterey Design Systems
Edited by the Electronicstalk Editorial Team on 11 October 2002
Four more patents for IC design flow
Monterey Design Systems has been issued four new patents by the United States Patent and Trademark Office bringing the company's patent total to 11
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Record quarter for Monterey
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The patents apply to the physical IC design technology that drives Monterey IC Wizard hierarchical design planning, Sonar physical synthesis and prototyping, and Dolphin physical implementation products. Two of the new patents are key to Monterey's progressive multi-objective refinement (PMR) technology.
This revolutionary approach to physical implementation provides for simultaneously optimising the design for multiple criteria and progressive refining the chip implementation until all requirements are met.
Monterey does not separate physical implementation into discrete, sequential steps performed by multiple, disparate point tools, as do all other vendors.
Rather, all construction and analysis operations are performed simultaneously.
Further reading
Upgrade accelerates physical implementation system
The Dolphin physical implementation system incorporates patented Monterey Progressive Refinement technology to simultaneously optimise a design for timing, power, area and signal integrity
Prototyping system predicts device performance
Calypso is the industry's first silicon virtual prototyper to combine hierarchical design planning and silicon performance estimation in a single, integrated tool
Monterey PMR is indispensable for nanometer process technologies and results in a fast, predictable path to total design closure.
The importance of this approach - using integrated technology that progressively refines the design and simultaneously optimises multiple design criteria - has become widely accepted by the industry.
Several articles on this topic have recently appeared in the press.
Although most of these articles discuss future planned development work, Monterey is already shipping products incorporating this approach to nanometer design.
Two further patents were awarded for Monterey's hierarchical design planning technology.
IC Wizard is the only commercially available top-down hierarchical design planning product.
IC Wizard provides automated design planning capabilities that can dramatically improve die size and turnaround time on multi-million-gate hierarchical SoC designs.
IC Wizard has been credited with over 100 tapeouts from leading semiconductor companies, the most recent one being a 3.3 million gate telecommunications chip from Fujitsu.
"Monterey IC Wizard continues to be the only viable solution for top-down, multi-level hierarchical design", said Wolfgang Helfricht, Product Marketing Director at Monterey.
"Not only does Monterey have the best solution for multi-level hierarchical design, we have the only solution.
Every patent puts more distance between Monterey and the rest of the field".
The technologies protected by these patents are available today in the Monterey IC Wizard, Sonar and Dolphin products on all supported hardware platforms.
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