Product category: Communications ICs (Wired)
News Release from: Zarlink Semiconductor | Subject: ZL30410
Edited by the Electronicstalk Editorial Team on 05 August 2003
Digital PLL banishes jitter
The ZL30410 digital PLL is a full-featured timing chip with the industry's lowest jitter, for access line cards operating at OC-3 rates.
The ZL30410 digital PLL is a full-featured timing chip with the industry's lowest jitter, for access line cards operating at OC-3 rates With the ZL30410 digital PLL and the company's analogue PLLs for line cards, Zarlink is the first semiconductor company to offer both digital and analogue timing devices for standards-compliant line cards in high-speed Sonet/SDH access systems
This article was originally published on Electronicstalk on 7 Feb 2001 at 8.00am (UK)
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