Product category: Design and Development Software
News Release from: Mentor Graphics UK | Subject: Seamless
Edited by the Electronicstalk Editorial Team on 17 July 2003
Coverification extends to
latest ARM cores
Mentor Graphics has developed Seamless coverification processor support packages for the ARM1136J-S and ARM1136JF-S high-performance cores
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Mentor Graphics has developed Seamless coverification processor support packages (PSPs) for the ARM1136J-S and ARM1136JF-S high-performance cores. These are the first new models delivered under the recently extended licensing and distribution agreement between ARM and Mentor Graphics. The Seamless PSPs for the ARM11 cores are high-performance bus-cycle-accurate models which completely simulate pipelines, caches, and the full ARM and Thumb instruction sets, including Java extensions.
Along with the Seamless PSPs for the ARM7, ARM9 and ARM10 families, the ARM11 core-based PSPs are amongst the first to implement the Seamless Version 5 Performance Profile Viewer.
Users of the ARM11 core-based PSPs can profile software, chart memory transactions, monitor cache efficiency and plot bus usage and arbitration delay.
This data can guide the designer to improvements that can be made to the system's performance.
Seamless provides support for all popular logic simulators, including the Model Technology ModelSim environment, as well as many software development environments.
The ARM11 core-based PSPs are integrated with debuggers from Mentor Graphics and ARM and have been verified against a range of code development tools and real-time operating systems such as the Mentor Graphics solution, the Nucleus tool.
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ARM11 core-based PSPs are fully compatible with the Seamless C-Bridge technology and the Platform Express tool.
The C-Bridge technology enables the effective verification of ARM designs implemented entirely in C (including System C) or in mixed C/RTL descriptions using the proven Seamless technology.
With the Platform Express ARM11 core-based library, designers can quickly assemble and integrate compatible IP and immediately leverage the full power of Seamless.
First introduced in 1996, the Seamless hardware/software coverification environment has become firmly established as the market leader with support for over 120 CPUs and DSPs.
"Mentor Graphics is the leading supplier of coverification solutions for ARMR cores", said Duncan Bryan, EDA Relations Manager, ARM.
"ARM recently renewed and extended our agreement with Mentor Graphics, thereby ensuring our partners' continued early access to the best-in-class coverification models for new ARM processors".
The ARM11 core-based PSP is built using Modelware, a second-generation interface expressly developed by Mentor Graphics for integration of cycle-accurate CPU models with Seamless.
The combination of Modelware and ARM's cycle callable models ensures that end customers have quick access to efficient and accurate coverification solutions for ARM cores.
ARM and Mentor Graphics first collaborated on the development of co-verification solutions in 1997.
Since then, over 80 customers worldwide have licensed co-verification solutions for ARM cores from Mentor Graphics.
ARM partners have deployed the Seamless environment as a critical component of their verification process for such diverse applications as wireless communications, digital imaging, automotive and networking.
The ARM1136J-S and ARM1136JF-S core-based PSPs are available for Solaris, HP/UX and Red Hat Linux platforms.
Pricing for ARM core-based PSPs starts at $20,000.
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