Click on the advert above to visit the company web site

Product category: Design and Development Software
News Release from: Mentor Graphics UK | Subject: AMS SoC design tools
Edited by the Electronicstalk Editorial Team on 30 August 2002

Front-to-back design flow
meets SoC challenges

Mentor Graphics has introduced a major new release of its front-to-back IC design tools for analogue/mixed-signal SoC designs

Mentor Graphics has introduced a major new release of its front-to-back IC design tools for analogue/mixed-signal (AMS) SoC designs. The increasing demand for more complex features in consumer electronics has fostered exponential growth in the amount of analogue content on mixed-signal SoCs.

In order to address the challenges of these chips, Mentor Graphics has made AMS SoC design tools a core focus, and has added functionality to existing tools while developing cutting-edge new tools.

With its industry-leading solutions, Mentor Graphics now offers the most complete IC design flow to ensure success for designers creating complex AMS SoC designs.

"To stay ahead of the growing complexity we're seeing in today's SoC designs, we selected Mentor's design methodology because we were able to create a single netlist containing data from multiple sources, then simulate at different levels of abstraction", said Rami Ahola, senior RF design engineer at Spirea.

"The Mentor tools have also allowed us to apply the unique techniques we've developed to maximise CMOS processing capabilities for RF circuits".

"This is a significant release for Mentor Graphics and our customers", said Jue-Hsien Chern, vice president and general manager, deep sub-micron division, Mentor Graphics.

"We've made dramatic engineering advances in our products, which ensure our customers will continue to meet the increasingly complex challenges of the AMS SoC design space.

Our strategy has been to develop technologically superior tools for all phases of the design flow, and this is very apparent in this release".

The Mentor Graphics AMS SoC flow includes Design Architect R-IC (including a new AMS SoC design cockpit), ADVance MST (single-kernel simulator for analogue, digital, transistor-level and RF simulation), IC Station (physical layout and implementation), Calibre (the industry standard for physical verification) and Calibre xRC (a new full-chip, transistor-level parasitic extraction tool).

All tools are available immediately.

One of the major challenges in traditional design flows has been the separate, isolated development of analogue and digital subsystems, wherein the integration of these components does not take place until layout, and testing occurs after fabrication.

Because of this, AMS SoC design, verification and simulation have become slow, expensive and error-prone.

Design Architect-IC now offers a new, multilevel, multilanguage IP management environment for the setup of complex simulations, in addition to schematic-driven layout and crossprobing.

This SoC design cockpit brings together design components created with analogue, digital and mixed-signal hardware description languages (HDLs), including VHDL, Verilog, VHDL-AMS and Verilog-AMS, as well as transistor-level schematics.

Design Architect-IC assembles the multi-format design data, then enables the creation of a single netlist for verification of all components.

As analogue and RF content continues to increase in today's SoC designs, simulation has become a bottleneck in the design process.

To solve this problem, the new version of ADVance MS combines four powerful simulation technologies, which gives designers the ability to choose the appropriate simulation engine for the various design components.

ADVance MS consists of the ModelSim tool for digital simulation, the Eldo tool for large signal model simulation, the Mach TA tool for fast circuit simulation and Eldo RF for modulated steady-state simulation.

Calibre's physical verification tool suite, Calibre DRC and Calibre LVS, ensures that IC physical designs conform to foundry manufacturing rules and match the intended functionality of the chip.

Calibre features design style-independent execution to provide optimal performance on designs ranging from random access memories to SoCs using a single, qualified rule file.

Calibre also provides advanced debugging capabilities, including intuitive error reporting, a graphical results viewing environment and hierarchical error isolation.

The combined force of design style independence and advanced debugging extend Calibre's world-class run time performance to further reduce verification time by simplifying tool set-up and error correction.

Because process geometries keep shrinking, accurate parasitic data for the entire design is absolutely crucial in order to achieve accurate post-layout simulation.

Newly introduced today, Mentor Graphics Calibre xRC is the only extraction solution available that enables transistor-level extraction for all circuit types.

Historically, designers have been forced to use different extraction tools for different types of circuits.

Calibre xRC combines the proven performance and capacity of the Calibre hierarchical engine with the accuracy and layout versus schematic (LVS) integration of xCalibre to handle the full range of circuit types found in AMS SoC designs (analogue, memory, custom etc).

The Mentor Graphics AMS SoC tools are designed to work best when used together, but Mentor also believes in interoperability and industry standards versus proprietary databases and data formats.

Thus, the tools can also be individually inserted into any design flow with minimal disruption to the company's existing methodologies.

All of the Mentor Graphics AMS SoC design tools are Linux compatible, which offers users dramatic savings in infrastructure costs, along with increased performance.

The tools also operate on Sun and HP platforms.

(This was Electronicstalk's Top Story on 30 August 2002) Request a free brochure from Mentor Graphics UK....

• Mentor Graphics UK: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• NEW
• Electronicstalk Home Page

Search the Pro-Talk network of sites

Put your news on Electronicstalk  |   Advertise  |   Get the free Electronicstalk newsletter
Electronicstalk Home  |   About Electronicstalk  |   Copyright © 2000-2007 Pro-Talk Ltd, UK