The EDA Technology Leader

Product category: Design and Development Software
News Release from: Mentor Graphics UK
Edited by the Electronicstalk Editorial Team on 29 May 2002

TSMC supports Mentor
design rule checking

Note: A free brochure or catalogue is available from Mentor Graphics UK about its services. Click here to request a copy.

Calibre DRC (design rule check) rule files are now available for TSMC's Nexsys 90nm technologies, the most advanced of TSMC's process offerings

Nexsys processes, with their exacting manufacturability requirements and increased process complexity, pose significant challenges for physical verification. These 90nm rule files, the first available from TSMC, exploit the most advanced capabilities of Calibre ensuring that customers using TSMC's reference flow can rapidly verify the SoC designs enabled by Nexsys technology.

Developing the Calibre solution required close co-operation between TSMC and Mentor Graphics engineering teams.

TSMC's Calibre rule files received extensive qualification, minimising issues of design transition from tape-out to manufacture.

"Our customers can rely on Calibre rule files to accurately verify their designs", said Cliff Hou, Design Services Department Manager at TSMC.

"Not only do we put them through TSMC's rigorous Double Blind QA procedure, but, because Calibre has been used to verify designs in our production environment for more than two years, we know that they cover real world design conditions".

TSMC has a long-standing relationship with Mentor Graphics through Mentor's Design for Manufacture (DFM) Silicon Partners Programme.

Through DFM, TSMC and Mentor have developed an extensive set of design rule checking (DRC), layout vs.

schematic (LVS) and parasitic extraction rule files that can be obtained from TSMC Online.

This enables customers to rapidly complete physical verification with Calibre on the newest TSMC processes.

"The 90nm node will require not only unprecedented performance and capacity from a physical verification tool, but also the flexibility to handle SoC designs incorporating analogue and digital IP of widely divergent design styles", said Joseph Sawicki, general manager of the Mentor Graphics physical verification and analysis division.

"Calibre is ready now for the challenges of the designs we expect to see in 90nm technology".

Customers can download scripts, makefiles and utilities directly from http://online.TSMC.com.tw.

Application notes, guidelines and tutorials are also available.

Request free introductory details about products from Mentor Graphics UK....

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