Product category: Intellectual Property Cores
News Release from: LSI Europe | Subject: G90-based 12Gbit/s interface
Edited by the Electronicstalk Editorial Team on 21 June 2004
Serial interfaces scale up to 12Gbit/s
LSI Logic Corp has tested and validated 12Gbit/s high-speed serial interface circuits in its G90 90-nanometre process technology
LSI Logic's G90-based 12Gbit/s interface technology enables serialiser/deserialiser (serdes) cores with quadruple the bandwidth of existing backplanes and double the speed of planned 6Gbit/s backplane upgrades. This industry-leading solution is designed to meet the requirements of the emerging Optical Internetworking Forum (OIF) CEI 11 - LR (long reach) standard and provides a leap in performance for storage systems, networking, and telecommunications applications.
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"With our demonstrated 12Gbit/s serial interface technology, LSI Logic provides an easy path to increase system bandwidth so that our leading ASIC and RapidChip platform ASIC customers can differentiate their high-speed datacom, telecom, and storage systems designs", said Jean Bou-Farhat, Vice President, CoreWare, LSI Logic.
"We continue to push the leading edge of technology in order to meet customers' requirements for time-to-market, performance, reliability and flexibility".
In developing 12Gbit/s serial interface technology, LSI Logic leveraged its extensive experience in high speed serdes cores which support a range of applications from 155Mbit/s Sonet traffic to 6.4Gbit/s backplane links.
Further reading
LSI releases sluggish Q1 results
Chip maker's first quarter results show reduced revenue compared with last year's figures
To achieve these breakthroughs with high-speed serdes technology in 90nm nodes, the company's high speed mixed signal engineers and packaging engineers worked closely together to provide a system solution with robust signal integrity, a necessary requirement for today's high-speed interfaces.
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