Product category: Intellectual Property Cores
News Release from: LSI Europe | Subject: CoreWare IP
Edited by the Electronicstalk Editorial Team on 26 February 2004
Memory PHY core
speeds to latest devices
A new physical layer memory interface ASIC core is optimised for operation up to 667Mbit/s for RLDRAM-II, FCRAM-II and network DRAM-II memories
A new physical layer (PHY) memory interface ASIC core is optimised for operation up to 667Mbit/s for RLDRAM-II, FCRAM-II and network DRAM-II memories. The core is the newest addition to the LSI Logic Gflx (0.11-micron) CoreWare portfolio, and supports cell-based ASICs and RapidChip Platform ASICs for fast SoC designs.
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Aimed at high-end switches, routers and server applications, the core offers customers a reliable, scalable and flexible solution that is easy to implement.
"This new offering, especially when combined with our existing high-speed connectivity solutions, opens up new capabilities for our customers", said Majid Bemanian, Senior Director of Marketing, LSI Logic's Communications Products Division.
"Our physical layer solution brings the performance advantages of advanced SRAM and the density of DRAM to our customers, lowering their overall system cost".
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LSI Logic's proven physical layer interface with preverified functionality, layout, and timing closure allows customers to design high-density chips faster, more predictably and at a lower cost.
The physical layer consists of datapath, address/command hard macros and impedance-controlled HSTL I/O.
The HSTL I/O has been designed to address the current 1.8V and next generation 1.5V RLDRAM-II, FCRAM-II and network DRAM-II memory devices, allowing system designers to scale from current to future lower power devices.
Features like on-die termination (ODT), linear impedance driver, excellent duty cycle matching and optimised routing provide an interface of superior signal integrity ensuring optimal performance and first pass silicon success.
The core and the HSTL I/O are immediately available for customer design-ins.
LSI Logic's extensive library of CoreWare IP offers proven, easy-to-integrate, performance-leading cores and system solutions.
The company is a leader in providing connectivity solutions with high-speed standards-compliant serdes and memory interfaces - including 622Mbit/s to 6Gbit/s serdes (based on GigaBlaze and HyperPHY cores) which support PCI Express, PCI-X 2.0, Gigabit Ethernet, SGMII, XGXS, XAUI, Serial RapidIO, HyperTransport, InfiniBand, SAS, SATA, 1 to 4.25G Fibre Channel, 1/10Gbit, SGMII, SFI4.1, SPI4.2, XGXS as well as external memory interface solutions for DDR-SDRAM, QDR-SRAM, RLDRAM, FCRAM, and Network DRAM.
Additionally, LSI Logic provides a full range of high-performance, cost-effective embedded ARM and MIPS processor cores and associated systems, licensable ZSP DSP cores, reference designs, processor peripherals and amba on-chip bus structures.
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