Product category: Intellectual Property Cores
News Release from: LSI Europe | Subject: HyperTransport PHY core
Edited by the Electronicstalk Editorial Team on 4 June 2003
HyperTransport core powers high-speed data
A new HyperTransport physical interface (PHY) core from LSI Logic offers an aggregate bandwidth of 12.8Gbyte/s
The LSI Logic Hypertransport PHY core is immediately available for ASIC customers as part of the company's Gflx 0.11-micron process technology CoreWare library and is ideal for use with LSI Logic's innovative RapidChip platform ASIC products. HyperTransport interconnect technology is a popular high-speed, high-performance, point-to-point link for integrated circuits, developed to enable the chips inside high-performance communications, storage and networking devices to communicate with each other faster than with existing technologies.
This article was originally published on Electronicstalk on 4 June 2003 at 8.00am (UK)
Related stories
LSI to shed IC assembly and test operations
Move is expected to achieve greater cost efficiencies through the adoption of a variable cost structure and to provide for scalable capacity without additional capital investment
LSI to shed consumer products business
Magnum Semiconductor is to acquire the LSI consumer products business, leaving LSI to focus its investments on its storage, networking and mobility market segments
LSI Logic is a contributor member of the HyperTransport Consortium, providing expertise in influencing next generation specifications.
"The LSI Logic HyperTranport PHY core adds a new high performance interface to our extensive CoreWare IP portfolio and enables us to maintain leadership in rapidly providing new I/O interfaces to our customers", said Tom Sandoval, Vice President, Communications and ASIC Marketing, LSI Logic Corp.
"This is a robust solution that addresses the bandwidth and scalability requirements for new generations of high-performance devices".
Further reading
Modem chipsets embed flexible communications
An all-new line of embedded modem products includes a pin-compatible family of data and fax modem chipsets and a single package monolithic data access arrangement
Comms processors use carrier-class technology
New generation of advanced communication processors will enable network equipment designers to provide high-bandwidth and real-time services
The LSI Logic HyperTransport PHY core is compliant with the HyperTransport Technology PHY Interface Specification (Version 1.01) and the HyperTransport I/O Link Protocol Specification (Version 1.03).
LSI Logic has performed interoperability testing with GDA Technologies' popular HyperTransport IP designed to help enable HyperTransport adopters to launch HyperTransport technology-based products in a timely manner.
"GDA's proven high quality HyperTransport IP for cave, tunnel, host and bridge implementations combined with LSI Logic's HyperTransport PHY core provides customers with a preverified IP solution that will help shorten time-to-market and cut the cost of product development", said Prakash Bare, Vice President of IP Business at GDA Technologies.
"We are pleased to be partnering with LSI Logic to speed the development of highly integrated HyperTransport solutions".
Key features of LSI Logic HyperTransport PHY core include: a datarate scalable from 400Mbit/s to 1.6Gbit/s; support for 2/4/8/16/32bit links in each direction; a single PLL supports up to 32 channels; high-speed HyperTransport LVDS I/Os; and options of wire-bond and flip chip packages.
• LSI Europe: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• NEW
• Electronicstalk Home Page
Related Business News
MathStar, Inc. Announces High Definition MPEG-2...
...Encoder IP Core for the Arrix(TM) FPOA. MathStar, Inc. , a fabless semiconductor company specializing in high-performance programmable logic, announced today the availability of the company's high definition MPEG-2 Encoder IP Core for the Arrix field programmable object array .
Cast Selects Avery Design Systems For...
...Pci Express Verification Ip. Semiconductor intellectual property provider CAST, Inc. today announced that it has begun using the PCI-Xactor test environment from Avery Design Systems to verify its current and future PCI Express IP cores.
Vsia Announces Release Of Qip Metric...
...Now Publicly Available With Hard Ip Extension. The VSI Alliance , the leading IP standards body for the electronics industry, today announced the Quality IP Metric version 3.0, which includes the hard IP extension, is now publicly available.
Gda Technologies Selected By Renesas Technology...
...For Pci Express To Amba Axi Bridge. Gda Technologies, Inc., a fast growing supplier of Intellectual Property and Electronic Design Services , today announced that Renesas Technology Corp., a leading semiconductor company, has selected GDA for development of a PCIE 2 AMBA AXI Bridge to be
System management tool starts at $1.20
Actel has introduced a new reference design for embedded applications that enables intelligent system and power management implementations starting at $1.20.
Search the Pro-Talk network of sites
