Product category: Microprocessors, Microcontrollers and DSPs
News Release from: LSI Europe | Subject: Gflx
Edited by the Electronicstalk Editorial Team on 28 March 2003
SoCs put submicron silicon
in flip chip packaging
LSI Logic can now produce advanced flip chip packaging products with its Gflx 0.11-micron copper- and low-k-based SoC product line
The milestone allows designers to take advantage of true low-k and copper in conjunction with advanced flip chip packaging and ensures the most cost-effective, robust solution for leading edge communications, consumer and storage applications. This advanced flip chip capability follows LSI Logic's Pad on I/O technology announcement, which places bond pads directly on top of active I/O circuits in a chip design and is already in production using copper/low-k processes.
This article was originally published on Electronicstalk on 28 March 2003 at 8.00am (UK)
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"Solving issues of new material characterisation such as copper interconnect with low-k dielectric are complex, and its always challenging to ensure that advanced packaging technologies keep pace", said Maniam Alagaratnam, Vice President, Package Development, LSI Logic Corp.
"We have demonstrated our industry leadership in developing manufacturable copper/low k solutions with the introduction of Pad on I/O for wire bond interconnect technologies, and are proud of our latest achievement in manufacturing flip chip devices.
Teams of engineers spent several months characterising the materials and processes required to ensure the performance and reliability of our flip chip packaging technology for RapidChip and SoC designs using LSI Logic Gflx silicon technology".
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An all-new line of embedded modem products includes a pin-compatible family of data and fax modem chipsets and a single package monolithic data access arrangement
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New generation of advanced communication processors will enable network equipment designers to provide high-bandwidth and real-time services
LSI Logic's previous experience in the material properties and behaviour of low-k dielectrics used in its G12 0.18-micron silicon technology placed the company in a leadership position in developing an optimised flip chip packaging technology.
The advancements firmly establish the electrical/mechanical integrity of the copper/low-k silicon chip to ensure the most reliable and robust solution in the industry.
This innovative advanced packaging capability further extends LSI Logic's packaging portfolio that encompasses a full-range of offerings from high-volume leaded packages to cutting-edge flip chip solutions to meet specific customer and market requirements.
"When the semiconductor industry introduced copper metallisation and low-k dielectrics, the focus was on silicon manufacturability and reliability with very little detail to the interaction between the silicon die and the package", said Stan Mihelcic, Senior Manager, Advanced Packaging Solutions, LSI Logic.
"As the industry continues to struggle with copper/low-k silicon development, LSI Logic has developed its Gflx process as a reliable total solution, which includes technology for advanced packaging that is required for quick, predictable time-to-market solutions of complex ICs.
We have not been forced to compromise and use fluorine-doped silicate glass (FSG) like many others have at the 0.13-micron node".
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