Product category: Microprocessors, Microcontrollers and DSPs
News Release from: LSI Europe | Subject: LSI403LP
Edited by the Electronicstalk Editorial Team on 4 September 2002
Flexible on-chip memory
aids DSP applications
Based on the ZSP400 core, the LSI403LP is designed for cost-sensitive applications requiring low power consumption, high throughput and flexibility
Based on LSI Logic's ZSP400 core, the LSI403LP is designed for cost-sensitive applications requiring low power consumption, high throughput and flexibility such as consumer electronics and customer premise equipment (CPE). These applications, which include such equipment as digital audio players, cable and DSL modems and set-top boxes, require advanced signal processing technology to support high quality audio and voice services.
This article was originally published on Electronicstalk on 4 September 2002 at 8.00am (UK)
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A key competitive advantage of ZSP standard products is the ability for customers to later migrate to system-on-chip integration for further cost reduction, while leveraging their software investment.
ZSP technology is the only DSP solution in the market available in all three forms: standard product, ASIC core and licensable IP.
"DSPs are permeating the consumer electronics market at lightning speed", said Will Strauss, president of market research firm Forward Concepts.
"The introduction of the LSI403LP by LSI Logic clearly serves the needs of this market with a cost-effective DSP with performance and flexibility to address its ever increasing need for signal processing capabilities".
The cost-effective 16bit fixed-point LSI403LP is LSI Logic's first DSP to be implemented in a 0.13 micron copper technology process, resulting in a smaller die size and power consumption reduction.
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The LSI403LP with flexible, on-chip memory consists of 16Kword of instruction memory, 16Kword of data memory plus 16Kword of configurable on-chip instruction/data memory.
Configurable memory allows developers to optimise on-chip instruction and data memory allocation for their specific applications.
The total of 48Kword of on-chip memory can support complete audio and voice applications, eliminating the need for external memory that would increase system cost and power.
"This latest addition to our ZSP standard product portfolio offers an attractive combination of price, performance and configurability that hits a sweet spot for DSP applications", said Tuan Dao, vice president of LSI Logic's DSP Division.
"Combined with available production ZSP software for industry-standard algorithms, system designers can benefit immediately from the LSI403LP device".
The LSI403LP is housed in a 208-pin PQFP package and operates up to 150MHz for a maximum throughput of 600MIPS.
This is achieved via a four way superscalar engine with four execution units; two multiply accumulate units (MACs) and two arithmetic logic units (ALUs).
This functionality allows the LSI403LP to execute two multiply-accumulate operations in a single clock cycle deliver high-performance while consuming less than 0.12mW/MIPS of power in a typical application.
In addition, single cycle 32 x 32bit multiply, bit-manipulation and 32bit arithmetic and logic operations are supported for optimal performance that addresses the dynamic range requirements of audio processing applications.
For maximum I/O performance and flexibility, the LSI403LP provides two high-speed time-division multiplexing (TDM) serial ports with integrated G.711 PCM companding hardware, a single 8bit host processor interface (HPI), and external memory interface unit, and 4-pin programmable I/O (PIO) port.
Other on-chip peripherals include two 16bit timers and an enhanced eight-channel DMA controller.
The LSI403LP is sampling now and will be in production in Q4 2002.
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