News Release from: Fujitsu Microelectronics Europe
Edited by the Electronicstalk Editorial Team on 3 February 2003
Segment shuffling cuts speedy DAC distortion
The MB86064 is a dual 14bit 800Msample/s digital to analogue convertor, and is the first application specific standard product based on Fujitsu's next generation DAC technology.
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The MB86064 is a dual 14bit 800Msample/s digital to analogue convertor, and is the first application specific standard product based on Fujitsu's next generation DAC technology. Until today Fujitsu has been providing customers with early access to the next generation DAC technology through mixed signal ASIC (MS-ASIC) solutions. The move to provide an ASSP solution will enable applications where a custom approach is either not required or not justified.
"This ASSP is integral to the roll-out of our latest DAC technology, opening up more opportunities and markets.
The price/performance point achieved enables the cost-effective realisation of high direct-IF multicarrier systems for GSM, W-CDMA and UMTS", said Neil Amos, Director of FME's Mixed Signal Division.
As well as radically improved performance from innovative circuit designs, the product boasts a host of features ranging from the on-chip vector memories, which enhance system integration and test, to next generation segment shuffling which further improves dynamic performance.
The vector memories enable waveforms to be downloaded and executed on-chip.
For device test and evaluation this alleviates the need for a high-speed data generator, while in a final system application they are ideal for implementing tests on the subsequent analogue signal chain.
Analogue performance at high output frequencies is enhanced by novel current switch and switch driver designs which provide constant data-independent switching delay, reducing jitter and distortion.
The leap in performance provided by this DAC will be instrumental in enabling new architectures to reduce the costs of existing cellular infrastructure systems while simultaneously addressing future needs.
In four-carrier W-CDMA applications ACPR of 70dBc can be achieved with direct-IF generation at 300MHz, with even higher performance at lower output frequencies.
"This development reflects our position as the leader in high-speed DAC technology", emphasised Ian Dedic, Chief Engineer at FME's Mixed Signal Division.
"We have already been granted eight US patents protecting the jitter reduction techniques and other innovations used in the MB86064, and have further patent applications pending both in the USA and other countries".
Direct-IF architectures can now demonstrate cost competitiveness to more traditional direct modulation architectures, while avoiding their inherent drawbacks.
Bandwidths up to 100MHz can now be generated directly at these high IFs, sufficient to implement the entire UMTS band with digital pre-distortion.
The segment shuffling is a major enhancement over techniques introduced in the MB86060 and MB86061 DAC ASSPs.
This improves performance to the level sought after for next generation systems and high direct-IF architectures by moving distortion products out-of-band and reducing device-to-device variation.
"The MB86064 provides an unrivalled solution to the problem of generating wider transmit bandwidths in cellular basestations", highlighted Paul Maddox, Technical Marketing Manager at FME's Mixed Signal Division.
Implemented in Fujitsu's advanced mixed signal CS80A 0.18um CMOS process, the dual DAC core combined with LVDS data inputs and a versatile serial control port provides a complete high performance DAC solution.
Generating and driving the data for such a DAC has traditionally been restricted to expensive ECL-based technology.
However, the provision of a LVDS interface combined with the advance in data generating capabilities of ASSPs, ASICs and FPGAs enables cost effective, realisable solutions.
In particular, clock-to-data timing across the data interface can be guaranteed by using FPGAs with phase locked loop (PLL) or delay-locked loop (DLL) clock generators and external reference clock loopback.
The provision of a dual DAC has particular benefit to cellular infrastructure applications, for example either transmit with diversity or combined dual transmit configurations.
Other application areas are expected to include test equipment and video/display systems.
The MB86064 is housed in Fujitsu's enhanced fine-pitch ball grid array (EFBGA) package.
The EFBGA range has been developed specifically to meet the needs of high performance mixed signal devices.
Benefits include optimised signal routing within the package, easier PCB tracking and excellent thermal properties assisted by a thermal ball array directly under the device.
Using the 120-ball variant, the package measures 12 x 12mm.
Customer development kits and sample devices are available today.
Mass production is scheduled for Q3 2003.
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