Design simplifies metro-service access solutions
An industry-first carrier-class 5G multiservice access reference design achieves Ethernet and resilient packet ring transport over Sonet/SDH networks.
New from Exar Corp, MetroXS is an industry-first carrier-class 5G multiservice access reference design that achieves Ethernet and resilient packet ring (RPR) transport over Sonet/SDH networks.
MetroXS can reduce time to market entry for OEMs developing metro Ethernet and metro-service access solutions by up to 50%.
MetroXS targets carriers and service providers who need to send triple play traffic over existing Sonet/SDH networks.
The MetroXS hardware architecture comprises several Exar devices: Extendar 48 (XRT95L53) multiprotocol framer, a OC-48/STM-16 Sonet/SDH PHY (XRT91L80), plus the company's channelised 5G RPR MAC, and 4 GE/24 FE port Ethernet aggregation solution.
MetroXS leverages Exar's unified software API structure enabling system vendors to port their innovative applications on this platform with ease.
Developed ground-up, MetroXS supports a hybrid mix of TDM and packet services over Sonet/SDH.
"MetroXS is a no-compromise reference platform integrating all the hardware and software components required to build an advanced multiservice solution", said Sid Yenamandra, Director, Ethernet and Sonet/SDH products.
"Utilising this platform, OEMs can focus on their core competencies and cut in half their development cycle on line card designs enabling them to quickly bring to market compelling proprietary feature-rich and differentiated products".
"With MetroXS, Exar is raising the bar in demonstrating total solutions for developers of multiservice access platforms", said Bob Wheeler, Senior Analyst, Linley Group.
"Utilising MetroXS, designers can leverage a variety of supported features that integrate the functionality of several line cards onto one reference platform".
The platform supports a unique blend of packet and TDM services over OC-48/STM-16 Sonet/SDH networks.
The underlying technology demonstrated includes 802.17 compliant RPR MAC framing over Sonet/SDH used primarily for intelligent ring protection and fair access control mechanisms in point to point Ethernet networks.
The reference design has Ethernet aggregation services with oversubscription and traffic engineering mechanisms as well as efficient transport of data traffic over Sonet/SDH networks using virtual concatenation (VCAT) and link adjustment capacity scheme (LCAS).
Leveraging a modular system architecture, OEM's can support E-Line/E-LAN in combination with Ethernet over Sonet, pure TDM or Ethernet over RPR transport over Sonet/SDH services all in a single, highly integrated 1RU pizza box form factor.
The platform supports four GE (1000Mbit/s) ports and two OC-48/STM-16 ports all using multirate SFP optics.
The platform consists of four high value functions - 5G RPR MAC, multiprotocol framer, Ethernet aggregation and OC-48/STM-16 PHYs.
The system also contains a single board computer (SBC) with a MPC860 for handling control plane functions.
The 5G RPR MAC supports the resilient packet ring (IEEE P802.17) protocol for link rates up to 2.488Gbit/s per ringlet.
RPR, a layer two media access control (MAC) technology, significantly increases the bandwidth efficiency of service provider networks by utilising twice the capacity of traditional Sonet/SDH rings.
RPR delivers dynamic bandwidth management while preserving the same kind of protection and resiliency found in Sonet/SDH networks.
The architecture uses a channelised engine to provide maximum flexibility for network configurations.
Up to five RPR stations (East and West MAC functions) are supported.
A ring can use any link rate up to the 2.488Gbit/s aggregate bandwidth.
The Ethernet aggregation device is a highly integrated multiport FE (10/100Mbit/s) and GE (1000Mbit/s) Ethernet MAC targeted for line rate and oversubscribed LAN/MAN and aggregation applications.
This highly integrated Ethernet aggregator reduces the number of components required to enable a nonblocking Ethernet solution with oversubscription support.
The device interoperates with off-the-shelf Ethernet physical layer devices via standard RMII/GMII interfaces and with network processors or RPR MAC solutions via a standard SPI-3 interface.
The integrated device includes on chip multirate Ethernet MACs, an extensive set of statistics and off-chip expandable packet buffer.
Extendar 48M (XRT95L53) is a highly integrated OC-48/STM-16, quad OC-12/STM-4 and OC-3/STM-1 multiprotocol framer processor.
This device combines standard OC-48/STM-16, quad OC-12/STM-4, OC-3/STM-1 Sonet framer functions with a flexible packet interface as well as a range of framing and encapsulation techniques integrated on a single chip.
Extendar 48M supports generic framing procedure (GFP) in combination with VCAT and LCAS, LAPS, POS, ATM and DS-3 capabilities configurable on a per-channel basis.
Extendar 48M is the industry's first device to integrate 48 DS3/Fractional DS3 framers on a single chip.
Extendar 48M, in addition to the Sonet OC-48/OC-12/OC-3 interfaces, supports OIF compliant SPI-3 interface with optional support for Exar's proprietary G-header interface.
Using this industry first G-header interface, Extendar 48M provides framing and encapsulation support for RPR, MPLS or proprietary client data that need to be transported over Sonet.
The XRT91L80 is a fully integrated Sonet/SDH transceiver for Sonet OC- 48/STM-16 allowing the use of forward error correction (FEC) capability.
The transceiver includes an on-chip clock multiplier unit (CMU), which uses a high frequency phase-locked loop (PLL) to generate the low jitter, high-speed transmit serial clock from slower external clock references.
It, also, includes FIFO and 4-to-1 serialiser circuits.
The receiver provides clock and data recovery (CDR) and 1-to-4 deserialiser functions.
The MetroXS platform is now available for demonstration.
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