Product category: Design and Development Software
News Release from: Cadence Design Systems
Edited by the Electronicstalk Editorial Team on 28 February 2006
Power-management methodology is enhanced
The Silicon Design Chain Initiative has published announced a second, enhanced version of its power-management methodology.
Industry leaders, working through the Silicon Design Chain Initiative (SDC), have announced a second, enhanced version of its power-management methodology and implementation up to tapeout of the ARM 1136JF-S processor as proof of the methodology and its interdependent technologies The new methodology is based on ARM IP, the Cadence Encounter digital IC design platform, and TSMC's Reference Flow 6.0
This article was originally published on Electronicstalk on 20 Nov 2001 at 8.00am (UK)
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