News Release from: Cadence Design Systems
Edited by the Electronicstalk Editorial Team on 3 August 2005
Quality of silicon is key to ARM-based SoCs
Global UniChip Corporation of Taiwan has adopted Cadence Encounter RTL Compiler global synthesis to improve the quality of silicon of its hardened IP.
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Global UniChip Corporation of Taiwan has adopted Cadence Encounter RTL compiler global synthesis, part of the Encounter digital IC design platform, to improve the quality of silicon (QoS) of its hardened IP. Global UniChip provides design solutions from silicon-proven intellectual property (IPs) to complex system-on-chip designs in both mature and leading-edge technologies. As an ARM Approved Design Centre partner, Global UniChip offers total design, consultancy and foundry capabilities to OEMs and silicon vendors of ARM core-based systems.
Using Encounter RTL Compiler to synthesise the ARM926EJ-S from RTL resulted in an 8% reduction in die size after place and route.
'We have successfully completed more than 10 tapeouts at 130nm using the Encounter platform, and are currently using it for 90nm tapeouts', said Jim Lai, Chief Operating Officer and President at Global UniChip.
'Based on our successes with Encounter RTL Compiler on customer designs, we are also using it to harden an ARM9 core, and we were pleased that the netlist the tool produced resulted in a smaller die area'.
'This will make our offering even more competitive'.
Encounter RTL Compiler global synthesis has proven through tapeouts to deliver improved performance, smaller die sizes, lower power consumption, and faster design closure through place and route.
Cadence defines this metric as quality of silicon (QoS).
This ability to produce smaller, faster and cooler chips in less time has increased customer competitiveness and reduced overall costs.
'We are excited that Encounter RTL Compiler played a significant role in enabling Global UniChip to improve their quality of silicon in a very competitive market', said Dr Chi-Ping Hsu, corporate vice president at Cadence.
'The new innovations brought by Encounter RTL Compiler has started a logic synthesis retooling trend worldwide to design smaller, faster, and cooler chips in less time'.
Encounter RTL Compiler has been used in production by more than 100 customers worldwide for competitive markets in consumer, communications, computer, networking, graphics, and SoC designs.
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