Product category: Design and Development Software
News Release from: Cadence Design Systems
Edited by the Electronicstalk Editorial Team on 06 August 2004
EDA deal helps Fujitsu towards IDM
business model
Fujitsu and Cadence Design Systems, Japan have signed a global partnership agreement to create advanced SoC design environments.
Fujitsu and Cadence Design Systems, Japan have signed a global partnership agreement to create advanced SoC design environments The design environments resulting from this agreement will further address today's demand for new design methodologies for the development of advanced SoCs
This article was originally published on Electronicstalk on 20 Nov 2001 at 8.00am (UK)
Related stories
Design flow speeds multi-million-gate design
Advanced Hardware Architectures has designed and taped-out a 10-million-gate forward error correction IC using the 64bit Cadence SP and R design flow.
STMicroelectronics uses Cadence VCC methodology
STMicroelectronics has selected the Cadence Virtual Component Co-Design (VCC) for both its automotive and digital consumer platform system-level design methodology and design flow.
Currently there is an urgent need for new design methodologies for the development of advanced SoCs, particularly for the latest SoC designs that incorporate process technologies of 90nm and beyond.
The semiconductor industry's rapid product cycles are driven by constant technological advances and are subject to volatile market fluctuations.
This makes it increasingly difficult to keep pace with the latest design environ