Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: Encounter
Edited by the Electronicstalk Editorial Team on 14 July 2004
New flow speeds 62-million-transistor to
tape-out
Cadence has provided a complete back-end design flow for one of Motorola's most complex chips, incorporating more than 62 million transistors.
Cadence has provided a complete back-end design flow for one of Motorola's most complex chips, incorporating more than 62 million transistors When Motorola initiated the design of the MRC6011 reconfigurable compute fabric (RCF) device, it ushered in a new era in signal processing with a highly complex and powerful device that delivers 24 (16bit) GMACs of horsepower
This article was originally published on Electronicstalk on 15 Apr 2004 at 8.00am (UK)
Related stories
Digital IC platform sorts out 8-million-gate SoC
Toshiba America Electronic Components (TAEC) has successfully implemented an 8-million-gate SoC using the Cadence Encounter digital IC platform.
Signal integrity tool spots damaging glitches
Cadence Design Systems has made significant enhancements to its CeltIC 4.1 signal integrity solution, a key technology of the Encounter digital IC design platform for nanometre-scale IC designs.
The MRC6011 is suited for MIPS-intensive, complex tasks in computationally intensive applications such as baseban