Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: CeltIC 4.1
Edited by the Electronicstalk Editorial Team on 06 March 2003
Signal integrity tool spots damaging
glitches
Cadence Design Systems has made significant enhancements to its CeltIC 4.1 signal integrity solution, a key technology of the Encounter digital IC design platform for nanometre-scale IC designs.
Cadence Design Systems has made significant enhancements to its CeltIC 4.1 signal integrity solution, a key technology of the Cadence Encounter digital IC design platform for nanometre-scale IC designs The enhanced software is up to three times faster than the previous version, includes overshoot-undershoot glitch analysis for sub-130nm silicon technologies, and a built-in timing engine for timing window convergence, and enables an accelerated SI closure flow within the Cadence SoC Encounter RTL-to-GDSII system
This article was originally published on Electronicstalk on 20 Nov