Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: Incisive
Edited by the Electronicstalk Editorial Team on 22 January 2004
Assertion checkers speed effective verification
Cadence and 0-In Design Automation have combined efforts to provide superior verification solutions to the market
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Functional verification takes tailored approach
Cadence Design Systems has repackaged its Incisive functional verification platform, including full solutions with tailored and integrated products coupled with methodologies for unique segment needs
Platform gains assertion-based verification
Cadence has developed a comprehensive assertion-based verification (ABV) solution as a part of its Incisive functional verification platform
As a key component of this relationship, Cadence will integrate and license 0-In's library of assertion checkers, protocol monitors, assertion synthesis, and assertion management technology. The combination of these capabilities with the industry-leading Cadence Incisive functional verification platform provides customers with new generation technology to increase verification speed and efficiency.
Through the agreement, 0-In's library of verification IP, which includes more than 70 preverified assertion checkers and more than 25 proven protocol monitors, will be integrated with the Incisive platform.
By using the assertion IP library, Cadence Incisive customers can specify assertions 10x to 100x faster than they can by using language-only approaches.
"Many of our customers are using 0-In assertion-based verification with the Incisive platform, so this was a natural next step", said Ping Chao, Executive Vice President and General Manager of the Design and Verification division, Cadence Design Systems.
Further reading
Platform reduces verification bottlenecks
Leading technology companies, including Fujitsu Network Technologies and S3 Graphics, have adopted the Cadence Incisive functional verification platform
Incisive decision for eInfochips
eInfochips has adopted the Cadence Incisive verification platform to meet its advanced design and verification requirements
"The integration of 0-In's leading library-based assertion approach with the Incisive platform will help designers and verification engineers verify faster, more efficiently and more thoroughly.
The relationship with 0-In demonstrates our overall strategy of open collaboration with industry leaders to provide customers with the most critical solutions for their design and verification needs".
"The CheckerWare library and assertion synthesis technology are perfect complements to the Incisive verification platform", said Steven D White, President and CEO of 0-In Design Automation.
"Our joint customers will benefit from the improvement in verification efficiency this collaboration delivers - from the specification level through to the implementation level".
The licensed assertion synthesis capability provides interoperability of assertion formats such as Property Specification Language (PSL), SystemVerilog Assertions (SVA) and the Open Verification Library (OVL).
This allows heterogeneous assertions to operate natively on the Incisive unified simulator and Palladium accelerator/emulator.
Incisive customers will now have the flexibility to mix-and-match language-based and library-based assertions to best meet their verification goals.
The relationship between 0-In and Cadence also leads to enhanced structural coverage capabilities in the Incisive platform.
Structural coverage complements functional coverage by monitoring implementation corner-cases, enabling measurement of total verification completeness by design teams.
0-In plans to continue development of its assertion-based verification offerings for the Incisive platform, including integration with and performance optimisation for the Incisive unified simulator and the Incisive analysis and debug environment.
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