Product category: Design and Development Software
News Release from: Cadence Design Systems | Subject: Encounter Version 3.2
Edited by the Electronicstalk Editorial Team on 29 September 2003
Platform speeds into nanometre design
Version 3.2 of the Cadence Encounter digital IC design platform delivers enhanced timing optimisation, placement and other technology for very large, fast ICs.
Version 3.2 of the Cadence Encounter digital IC design platform delivers enhanced timing optimisation, placement and other technology for very large, fast ICs The result is more rapid design closure and shorter overall development times
This article was originally published on Electronicstalk on 20 Nov 2001 at 8.00am (UK)
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In addition to improved timing optimisation and placement, Encounter 3.2 includes a new-generation technology that enables design teams to quickly assess the routing feasibility of different chip-floorplan and package-layout combinations, speeding the design of flip-chip and other large d