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Product category: Communications ICs (Wired)
News Release from: Analogix Semiconductor | Subject: D-PHY 5G
Edited by the Electronicstalk Editorial Team on 12 August 2004

Serdes chips speed through legacy
backplane test

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Analogix Semiconductor has completed testing its 6.25Gbit/s serdes chips using Tyco Electronics' HM-Zd legacy backplane system.

Analogix Semiconductor has completed testing its 6.25Gbit/s serdes chips using Tyco Electronics' HM-Zd legacy backplane system The Analogix D-PHY 5G backplane transceiver maintained error-free signals at extended trace distances of up to 56in in a set of rigorous tests simulating real-world conditions

Analogix's D-PHY 5G, introduced in April, was tested operating at a full 6.25Gbit/s rate with four full-duplex channels running simultaneously.

The device achieved a BER (bit error rate) of 10e-16 or better in tests with both encoded