Product category: Design and Development Hardware
News Release from: Actel Europe | Subject: Axcelerator evaluation board
Edited by the Electronicstalk Editorial Team on 8 November 2002
FPGA evaluation at Electronica
Actel will be demonstrating its Axcelerator field-programmable gate array technology on its booth next week at Electronica in Munich
Actel will be demonstrating its Axcelerator field-programmable gate array (FPGA) technology on its booth next week at Electronica in Munich (Booth 275 Hall A4). The Axcelerator evaluation board allows designers to access the high-performance features of Actel's nonvolatile Axcelerator FPGA devices as well as to explore various chip characteristics, such as LVDS I/Os, per-pin FIFOs, block RAM performance and phase-locked loop (PLL) operation.
This article was originally published on Electronicstalk on 8 November 2002 at 8.00am (UK)
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With this platform, Actel enables designers to quickly and accurately evaluate the feasibility of their own designs to determine suitability for their high-speed communications, interfacing and bridging applications.
Actel will also showcase its Flash-based, reprogrammable ProASIC Plus FPGA technology for ASIC alternative applications in the industrial, communications, networking and avionics markets.
The ProASIC Plus demonstrations will highlight the in-system programmability (ISP) feature of Actel's nonvolatile ProASIC Plus solution as well as its I/O drive characteristics, boundary scan operation, embedded RAM block performance and PLL operation.
Additionally, the demonstrations will enable designers to view the Actel Libero integrated design environment, Actel Designer software product and Actel Silicon Explorer II verification and logic analysis tool support for ProASIC Plus.
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