IP generators aid wireless design: News from AccelChip

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Adding to its extensive offering of DSP intellectual property, AccelChip, the industry's leading provider of IP and tools for Matlab and Simulink DSP algorithms targeting FPGAs and ASICs, has added three new AccelWare intellectual property (IP) generators to its popular AccelWare Advanced Math Toolkit. These unique new generators can be used in the deployment of adaptive signal processing filter algorithms commonly found in wireless solutions such as smart antenna beamforming applications and MIMO-OFDM wireless LAN design. The new AccelWare generators include a QR decomposition-RLS spatial filter which is based on a recursive least squares (RLS) approximation, a Givens array rotation, which rotates the elements of an array by a specified angle, and a triangular matrix inverse generator which builds logic that returns the inverse for an upper- or lower-triangular input matrix.

Adaptive signal processing algorithms that use RLS are found in numerous applications such as equalisation, beamforming and adaptive filtering.

'QRD-RLS adaptive filters are being hand-designed by companies around the globe', said Michael Bohm, CTO and Vice President of Product Development, AccelChip 'The advantage of using QR decomposition in an RLS algorithm is that it's a highly robust algorithm, less computationally expensive than performing an explicit matrix inversion and more numerically accurate'.

'By providing it as an AccelWare generator, customers take advantage of our model-based design flow, augmenting the simulation-only model provided by The MathWorks with an implementation model'.

As of the 2005.4 release, AccelChip now has matrix inversion and factorisation AccelWare core generators that support QRD-RLS spatial filters, QR matrix factorisation and inversion, singular value decomposition, Cholesky factorisation and inversion, and triangular matrix inversion.

In addition to the new AccelWare generators, enhancements have been added to the AccelWare Building Blocks and Signal Processing toolkits providing additional macro-architectures including an new streaming radix-4, FFT/IFFT generator that is capable of running over 100MHz on a Xilinx Virtex-4 device.

AccelChip will be providing a technical overview of an implementation of QRD-RLS adaptive filtering in beamforming applications at the GSPx Conference from 24th to 27th October in Santa Clara, California.

Ramon Uribe and Dr Tom Cesear of AccelChip will present their paper: 'Efficient methodology for implementation of matrix inversion in fixed-point hardware'.

This paper will also be available on the AccelChip website immediately following the conference.

Version 2005.4 of AccelWare IP Toolkits and of AccelChip DSP Synthesis are now shipping.

Current AccelChip customers on maintenance agreements will receive the new releases at no additional fee.

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IP generators aid wireless design

AccelChip has added three new AccelWare intellectual property generators to its popular AccelWare Advanced Math Toolkit.