Logic equivalence checker speeds verification: News from Verplex Systems

Note: Readers of the Editor’s free email newsletter will have read this news when it was announced. . It’s free!

FMC SOTA Design Technology of Hsinchu, Taiwan, has adopted formal verification software from Verplex Systems and has used it successfully throughout its design flow on a variety of complex IC designs. It has designed chips that are today in use for wired and wireless networking and storage device applications. A leading design services firm, FMC SOTA Design Technology selected Verplex's Conformal logic equivalence checker (LEC) after a competitive evaluation.

It found that Conformal LEC offered faster functional verification capabilities, reducing time to market, decreasing the likelihood of respins, and increasing confidence in tapeout decisions.

At FMC SOTA, Conformal is used to compare register-transfer level (RTL) and gate-level netlists after logic synthesis; gate-level to gate-level netlist comparisons after scan insertion; gate-level to gate-level netlist comparisons after physical optimization; and RTL to gate-level netlist comparisons after engineering change orders (ECOs.) "Our experience with Verplex has been top rate", says Peter Hsieh, President of FMC SOTA Design Technology.

"Its Conformal LEC is fast, easy to use and offers a completely independent check of our design tools, giving us further confidence in our designs.

Its customer support team is the best in the industry, helping us quickly integrate Conformal LEC into our flow for verifying our chips".

"FMC SOTA Design Technology is developing leading-edge chips and needs tools to accommodate its demandingly complex designs", adds C Michael Chang, President and CEO of Verplex.

"Verplex tools have always been superior for verifying the type of large, complex chips that FMC SOTA designs, so our close working partnership with them is a natural fit".

• Verplex Systems: contact details and other news
• Other news in Design and Development Software
• Email this news to a colleague
•
• RSS news feed for Verplex Systems
• RSS news feed for Design and Development Software
• Electronicstalk Home Page

News Release from: Verplex Systems Edited by the Electronicstalk Editorial Team on 11 July 2003

Logic equivalence checker speeds verification

FMC SOTA Design Technology of Hsinchu, Taiwan, has adopted formal verification software from Verplex Systems and has used it successfully throughout its design flow on a variety of complex IC designs.

Note: Readers of the Editor’s free email newsletter will have read this news when it was announced. . It’s free!

News Release from: Verplex Systems
Edited by the Electronicstalk Editorial Team on 11 July 2003