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Product category: Communications ICs (Wireless)
News Release from: Texas Instruments (April 2001-March 2006) | Subject: DRP architecture
Edited by the Electronicstalk Editorial Team on 20 February 2004

Digital RF architecture
cuts wireless power budget

A radical new approach to wireless chip design applies digital technology to greatly simplify RF processing and dramatically cut the cost and power consumption of wireless transmission and reception

A radical new approach to wireless chip design applies digital technology to greatly simplify RF processing and dramatically cut the cost and power consumption of transmitting and receiving information wirelessly. The DRP (digital RF processor) architecture has been successfully integrated on two Bluetooth products, as well as a GSM/GPRS digital transceiver in TI's lab.

As mobile wireless products gain colour displays, cameras, GPS location technology, local area networking capability and application processors to support digital audio and video, games, and PDA applications, board space and battery life can be greatly extended by the DRP design.

At the prestigious International Solid State Circuits Conference (ISSCC) this week researchers from TI have been presenting details of how DRP can reduce power consumption, die area and system board space by up to 50% over traditional analogue RF designs.

'The processing of radio signals with digital logic can significantly shift the paradigm for embedding wireless communications by making it easier to implement and to scale', said Dr Hans Stork, TI's Chief Technology Officer.

'With DRP, TI is leading the industry toward a future where wireless modules can be integrated into any kind of product, and provide the user with seamless access to a variety of network connections'.

TI previously announced it will sample to customers this year a highly integrated, single chip GSM/GPRS product integrating the DRP design using TI's 90nm process technology.

The GSM/GPRS version of the DRP architecture has already proven fully functional on engineering development silicon now in TI's lab.

TI has one single-chip Bluetooth product in production today with the DRP design, the BRF6100, and another sampling, the BRF6150.

'TI's DRP architecture brings together the company's signal processing expertise and in-house process technology in a fresh approach to RF processing', said Allen Nogee, principal Analyst, Wireless Component Technology, In-Stat/MDR.

'By incorporating RF functions digitally, TI provides the potential for modular radio configurations that address new applications and begin leading the industry toward software defined radio designs'.

The digital RF processor technology combines TI's years of signal processing architecture expertise with advanced semiconductor manufacturing capability to perform analogue functions with low power, digital CMOS logic.

As large blocks of CMOS logic can now operate at multigigahertz frequencies, sampled-data processing techniques, switched-capacitor filters, oversampling convertors, and digital signal processors can take over the role of analogue amplifiers, filters, and mixers.

Rather than an inefficient implementation of analogue blocks in a digital process technology, with the DRP the analogue signal is oversampled and processed in the digital domain.

As radio signals at the antenna are always analogue, a small amount of analogue processing is included in the DRP between the input and the first sampling function.

Once in the sampled-data domain, digital signal processing takes over.

The RF section of a cellphone can occupy up to 50% of the printed circuit board - space that is required for today's advanced feature sets.

Colour displays, cameras, GPS location technology, Bluetooth personal area networking, and WLAN connectivity for high-speed local-area data access, as well as application processors and additional memory to support digital audio and video, games, and PDA applications, are increasingly common.

In addition to reducing the number of components required to implement RF, a digital design scales readily with Moore's law and enables simple modification of key RF parameters to enhance performance through software rather than system or IC redesign.

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