News Release from: Tenison EDA
Edited by the Electronicstalk Editorial Team on 18 June 2003

VTOC to speed architectural modelling

Mysticom is adopting Tenison EDA's VTOC to speed architectural modelling of future ICs.

Note: Readers of the Editor’s free email newsletter will have read this news when it was announced. . It’s free!

Mysticom is adopting Tenison EDA's VTOC to speed architectural modelling of future ICs. Tenison VTOC is used by Mysticom to model key Verilog RTL blocks in C++. These are then integrated with Simulink architectural models for detailed analysis using Matlab.

Tenison VTOC provides a fully automated way of incorporating specialist and legacy RTL in high-level architectural models.

System designers are able to draw on detailed modelling of key components and incorporate legacy engineering to reduce designs risks in later phases of a project.

The high performance of VTOC models - 10x the best compiled Verilog - ensures such system analyses are completed in short timescales.

Mysticom uses detailed RTL models of key blocks in its design flow.

Prior to using VTOC, the company had to rely on simplified hand-written models and traditional simulation which was slow and hard to integrate with Simulink.

• Tenison EDA: contact details and other news
• Other news in Design and Development Software
• Email this news to a colleague
•
• RSS news feed for Tenison EDA
• RSS news feed for Design and Development Software
• Electronicstalk Home Page

 
Advertisers! Download our free 2006 media pack now