News Release from: Temex
Edited by the Electronicstalk Editorial Team on 15 July 2003
Kit speeds time reference design
Designers using Stratum-1 references can now quickly connect I/O cables to test and validate the performance and design concept of their timing system thanks to a new plug and play development kit.
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Designers using Stratum-1 references, such as GPS, Cesium, Loran-C, CDMA and E1/T1, can now quickly connect I/O cables to test and validate the performance and design concept of their timing system thanks to a new plug and play development kit from Temex. The Jumpstart SynClock+ designer kit (JSDK) overcomes the time and hassle associated with interconnecting and testing the complete timing system with other peripheral systems such as PCs, test instruments, and power supplies. The JSDK includes an easy-to-use evaluation board to plug in Temex' smart SRO-100/75 rubidium SynClock+ units, a CD-ROM and a user manual.
The CD-ROM contains the iSync+ Manager application to set up, configure, test and control the SynClock+.
The Temex SRO-100/75 is a patented, low-cost synchronised rubidium clock, which features a host of value-added integrated synchronisation functions through its advanced SmarTiming+ technology.
It allows customers to reduce cost and size by integrating synchronisation features into one standard package, where they were previously implemented externally on a complex, separate circuit.
The JSDK, excluding the SynClock+, is readily available.
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