Logic analysers take on RapidIO testing: News from Tektronix

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Tektronix has thrown its weight behind RapidIO, the fast-emerging intrasystem communication architecture. In the network computing market, there has been a constant demand for software transparency, greater reliability and higher bandwidth. The RapidIO interconnect architecture addresses these needs by providing a high-performance standard that optimises interaction between chip-to-chip and circuit board-to-board.

However, in order to accurately test and implement RapidIO technology, developers must have full visibility of its signals to identify and characterise faults.

Using the new Tektronix TMS805 RapidIO support package for the TLA family of logic analysers, developers can acquire and trigger on RapidIO packets, control symbols and transactions in real-time with minimal impact on the system's normal environment, allowing them to find elusive internal system bus faults and stay on schedule.

"There is a clear need to bring visibility into processor bus operation in high-speed environments.

Tektronix' implementation is unique, innovative, robust and scaleable up into the gigahertz environments we expect to see in RapidIO", said Tom Cox, Marketing Chair, RapidIO Trade Association: "The Tektronix TMS805 support package will be key for silicon manufacturers to develop robust design verification platforms and be of significant value to downstream customers when developing and integrating their hardware and software designs around silicon components".

"A new breed of processor and bus communication technologies is replacing the traditional front side bus in processor architectures and forming the cornerstone of fabric networks.

RapidIO holds immense promise as an intra-system communication standard, and we are pleased to offer the industry's best debug solution for acquiring, displaying and decoding RapidIO bus cycles", said Dave Ireland, Tektronix Design and Manufacturing Segment Manager, - Europe: "An integrated toolset of the TLA700 Series logic analyser with the TMS805 RapidIO support package, the TDS oscilloscope and a differential probe enables design engineers to quickly and easily implement RapidIO ports into their designs".

The Tektronix TMS805 RapidIO support package provides support for RapidIO rates up to 1Gbit/s.

It enables designers to capture RapidIO transmit and receive buses, trigger on control symbols or packets using predefined templates for common trigger events, view captured data in a packet display, and automatically link the transaction-level and operation-level activities between the transmit and receive buses.

At speeds of RapidIO's magnitude, it is essential to acquire and view both the digital and analogue properties of signals to properly characterise known faults.

The analogue multiplexing capability of the Tektronix TLA7Axx modules and the iView (Integrated View) package for analogue/digital display allows designers to integrate a TLA700 Series logic analyser and TDS6000 Series oscilloscope to view, trigger and characterise not only digital, but also analogue, characteristics of high-speed signals with a single, connectorless P6880 differential probe.

With the TMS805 support package, RapidIO developers now have access to a powerful, integrated analogue/digital toolset with bus-specific software support.

Jitter component identification and communication mask testing are also necessary in the RapidIO test and debug process.

Tektronix offers the TDSJIT3 jitter analysis software for the TDS6604 digital storage oscilloscope, which provides engineers with the industry's first real-time solution capable of characterising random and deterministic jitter (Rj/Dj) and predicting bit error rate (BER).

For communication mask testing, Tektronix offers the CSA7000 Series communications signal analysers, which deliver industry-leading performance and compliance mask testing at rates of up to 2.5Gbit/s.

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