Product category: Design and Development Software
News Release from: Synopsys
Edited by the Electronicstalk Editorial Team on 31 May 2002
TI adds delay
calculation to its Pyramid
Texas Instruments has standardised on the PrimeTime delay calculator in its Pyramid ASIC design flow
With the adoption of the PrimeTime delay calculator, TI deploys a consistent, unified methodology for delay calculation and static timing analysis across its digital design flow. "TI ASIC has used PrimeTime as a timing signoff tool for years and is now expanding its usage to include delay calculation", said Sharada Satrasala, general manager, India ASIC product development, Texas Instruments.
This article was originally published on Electronicstalk on 31 May 2002 at 8.00am (UK)
Related stories
Acquisition to expand IP portfolio to DDR
Synopsys is set to acquire the semiconductor IP assets of Mosaid Technologies, and will integrate these into its DesignWare IP portfolio
Development platform precedes Marvell processor
Virtual platform enables development of smartphones, handheld and consumer electronics devices that use the Marvell PXA3xx XScale technology application processor
"This change enables us to move to a common delay calculator that achieves excellent accuracy for 90 and 130 nanometer technologies and lays the foundation for PrimeTime-based signal integrity analysis in our design flows".
Built into Synopsys' PrimeTime and PrimeTime SI, the PrimeTime delay calculator provides accurate cell and interconnect delay information that is required to achieve signoff-quality STA and accurate signal integrity analysis.
This technology is the foundation for static crosstalk analysis in PrimeTime SI, enabling designers to accurately pinpoint crosstalk-induced timing failures on multimillion-gate designs.
"As our customers move to 0.13 micron design, they are looking for a standards-based, gate-level static timing solution that encompasses delay calculation, static timing and signal integrity analysis", said Antun Domic, senior vice president and general manager, Synopsys' Nanometer Analysis and Test business unit.
"By delivering an integrated solution in PrimeTime, Synopsys provides leading chip companies like Texas Instruments a unified methodology for static timing signoff".
• Synopsys: contact details and other news
• Email this article to a colleague
• Register for the free Electronicstalk email newsletter
• NEW
• Electronicstalk Home Page
Related Business News
Icoa Is Partnering With Anchorfree To...
...Enhance And Monetize Thousands Of Wi-fi Hotspots. Icoa, Inc., a national provider of wireless broadband Internet access and managed network services in high-traffic public locations, and AnchorFree Inc., a rapidly growing Wi-Fi community powered by advertising, have announced today that they are partne
Olympics raises demand for IT contractors
The number of IT contractors working in the engineering sector has almost doubled in 12 months because of demand generated by the 2012 Olympics, according to contractor Giant Group PLC.
Stellar Appoints CIO to Lead Call...
...Centre Outsourcing Technology Strategy. Stellar, a leading global business process outsourcing provider, today announced that Warwick Marx has been appointed Chief Information Officer of Stellar Asia Pacific.
Dell pushes for better Linux drivers
Dell wants to see better software drivers for Linux so that the firm can ship more notebooks and desktops running the operating system, according to one of its software engineers.
Eds Sales Take A Tumble
Dave Friedlos, Computing , Thursday 17 May 2007 at 00:00:00 But experts say downturn may reflect market weakness, writes Dave Friedlos Outsourcing giant EDS has released disappointing first-quarter figures showing slower growth and fewer con
Search the Pro-Talk network of sites
