Product category: Intellectual Property Cores
News Release from: Synplicity
Edited by the Electronicstalk Editorial Team on 16 April 2008
IP programme shows initiative for FPGA
designers
Programme delivers the industry's first and complete universal, encrypted design methodology for FPGA implementation.
Synplicity's ReadyIP Initiative is a programme that takes aim at simplifying the access, evaluation, and use of intellectual property (IP) for FPGA-based system design The ReadyIP programme delivers the industry's first and complete universal, encrypted design methodology for FPGA implementation, allowing users to incorporate and easily integrate IP from several third-party vendors within their designs using the Synplify Pro and/or Synplify Premier solutions, Synplicity's industry-standard synthesis environments
This article was originally published on Electronicstalk on 8 Jun 2001 at 8.00am (UK)
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The ReadyIP initiative comprises a number of key elements.
These include standards-based IP encryption with rights management to facilitate easy evaluation of IP; the System Designer, a new technology-independent IP integration capability that is now part of Synplicity's synthesis products; "pushbutton" Internet access to third-party IP directly from within Synplicity's FPGA design environment; and the use of the SPIRIT Consortium's IP - XACT IP packaging format to enable mix and match of IP from a variety of sources including the use of in-house IP.
Synplicity also announced that its ReadyIP initiative is be