Product category: Design and Development Software
News Release from: Synplicity | Subject: Certify
Edited by the Electronicstalk Editorial Team on 20 February 2003
Faster route to ASIC prototyping
Synplicity has enhanced its Certify verification synthesis software to ease the ASIC prototyping process and improve quality of results.
Synplicity has enhanced its Certify verification synthesis software to ease the ASIC prototyping process and improve quality of results (QoR) This new version of the Certify software offers advanced ASIC verification capabilities that provide designers with increased visibility into the prototyping process, including gated-clock reporting and source-code level partitioning
This article was originally published on Electronicstalk on 31 Jan 2007 at 8.00am (UK)
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Enhancements in the latest version of the Certify ASIC RTL prototyping software package aim to further accelerate the ASIC verification process.
The company also added a new timing engine and timing analysis capabilities, as well as support for Altera Corp's high-performance Stratix devices and the Linux operating system, among other enhancements.
With these enhancements, Synplicity believes designers can realise significant benefits in time savings, a requirement in creating high-performance ASIC prototypes.
"With ever-increasing nonrecurring enginee