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Product category: Design and Development Software
News Release from: Sequence Design | Subject: PhysicalStudio
Edited by the Electronicstalk Editorial Team on 27 May 2003

Optimisation package turns to leakage
current

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Sequence Design has launched a joint development effort with Toshiba Corp to optimise power and reduce wasted power consumption in semiconductors.

Sequence Design has launched a joint development effort with Toshiba Corp to optimise power and reduce wasted power consumption in semiconductors This methodology is based on Toshiba's Selective MTCMOS (multi-threshold CMOS) technology

The problem of leakage currents is growing at an exponential rate at line widths below 90 nanometres, according to Takashi Yoshimori, System LSI Division Technical Executive, Toshiba Semiconductor.

"It is now common for 20% or more of a chip's power budget to be consumed by leakage power alone, severely limiting the designer's ability to maximise circuit efficiency and performance", Yoshimori said.

"Sequence's leakage power methodology provides us with a way to turn the power supply to logic on and off as needed, eliminating waste and greatly extending battery life for handheld products".