Silicon Labs introduces clock tree design service

Silicon Laboratories has announced an online Clock Tree Design Service to provide custom timing architecture proposals that simplify design, reduce BOM costs and minimise risk during development.

The Clock Tree Design Service enables customers to enter their system-level timing requirements using a web-based utility, specifying multiple parameters including the number of clock inputs and outputs, input and output frequencies, signal formats and clock jitter.

The Silicon Labs applications engineering team reviews the requirements and provides a timing architecture optimised for performance, cost and lead time.

Timing proposals are provided in three business days.

'Our applications team has extensive experience with high-speed PCB design, signal integrity, signal termination, power supply noise rejection and other challenges common to high-performance applications,' said Mike Petrowski, general manager of timing products for Silicon Laboratories.

'Our online Clock Tree Design Service enables customers to solicit rapid feedback, accelerating the product development process while reducing risk and ensuring next-generation hardware designs are optimised for system performance,' he added.

In addition to the Clock Tree Design Service, Silicon Labs also offers the Clockbuilder web utility to enable customers to quickly develop custom, application-specific clock generators that support any combination of user-specified input/output frequencies.

The company's custom oscillator utility enables developers to specify a custom oscillator, build a part number and order samples in minutes.

Silicon Labs' complete range of clocks and XO/VCXOs are available with short lead times and its custom timing devices do not require non-recurring engineering charges (NRE) charges.

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