Smart Stacking technology ready for transfer

The Soitec Group has announced that Smart Stacking, its circuit stacking technology, is now ready for both manufacturing and technology transfer.

This low-temperature industrial process from Soitec's Tracit business unit achieves wafer-level circuit stacking onto a range of starting materials with excellent yield.

The technology offers designers the ability to move a finished circuit onto another carrier without jeopardising yield.

Smart Stacking enables the production of high-end image sensors; it will soon enable a range of new photonics applications, RF circuits, and the realisation of more complex 3D product architectures.

To decouple circuit fabrication from application needs, Soitec has developed this generic process to transfer thin layers of processed wafers onto a variety of materials.

Smart Stacking technology comprises low-temperature, high-energy wafer bonding, and thinning techniques.

The company reports that several wafer types coming from a number of worldwide foundries and IDMs have been processed for prototyping and production in its manufacturing line.

According to a recent study on 3D ICs by Yole Development, an independent semiconductor market research and analysis firm, the demand for wafer-level transfer processing is forecast to reach significant volume production by 2010/2011, mainly driven by image sensor applications.

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