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Product category: Design and Development Software
News Release from: Real Intent | Subject: PureTime 2.0
Edited by the Electronicstalk Editorial Team on 05 April 2007
Timing exception verifier is upgraded
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PureTime removes the risk of errors in Synopsys Design Constraint timing exception verification, so designers can avoid chip respins and product introduction delays.
Real Intent has begun shipping the next generation of its formal timing exception verifier software PureTime PureTime 2.0 removes the risk of errors in Synopsys Design Constraint (SDC) timing exception verification, so that designers can avoid chip respins and electronic product introduction delays