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Product category: Communications ICs (Wired)
News Release from: PMC-Sierra | Subject: Xilinx hardware interoperability testing
Edited by the Electronicstalk Editorial Team on 20 December 2001
Interoperability tests aid router design
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PMC-Sierra and Xilinx have performed successful hardware interoperability testing between PMC-Sierra's Xenon family of devices and Xilinx Virtex-II based POS-PHY level 4 (PL4) cores.
PMC-Sierra and Xilinx have performed successful hardware interoperability testing between PMC-Sierra's Xenon family of devices and Xilinx Virtex-II based POS-PHY level 4 (PL4) cores A collaborative effort between the two companies, the proven interoperability of the Xenon devices and the PL 4 cores will allow system architects to focus on system level aspects of the design rather than verifying connectivity
This article was originally published on Electronicstalk on 26 Feb 2001 at 8.00am (UK)