Product category: Communications ICs (Wired)
News Release from: PLX Technology Europe | Subject: PEX 8114, PEX 8516 and PEX 8532
Edited by the Electronicstalk Editorial Team on 05 July 2004
Switches and bridges ready for PCI
Express growth
The new PLX PEX line of PCI Express bridges and switches is billed as the industry's most complete and flexible line of interconnect chips based on PCI Express technology.
The new PLX PEX line of PCI Express bridges and switches is billed as the industry's most complete and flexible line of interconnect chips based on PCI Express technology The new PEX bridging and switching devices provide system and board manufacturers with a complimentary set of essential interconnect building blocks - a typical PCI Express-based system will incorporate both types of devices - for next-generation applications
This article was originally published on Electronicstalk on 20 Aug 2002 at 8.00am (UK)
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Switched-PCI architecture speeds expansion
The PLX GigaBridge switched-PCI architecture has been designed into Magma's new PCI expansion system.
Switched-PCI alternative for storage
As storage-system makers begin to adopt alternative interconnect technologies, switched-PCI is providing them a means of expanding and improving the overall performance of their systems.
The devices will sample in Q3, and PLX customers already are in development with their products using the PEX line.
This new PEX chip family from PLX, which has championed PCI Express technology since its inception and is among the first to announce interconnect silicon based on the architecture, delivers an array of unique features available from no other silicon vendor.
The PEX 8114 PCI Express-to-PCI/PCI-X bridge, the most versatile bridging device in its class, is capable of forward, reverse and non-transparent bridging, and features 1Gbyte/s throughput - all in a 17 x 17mm BGA package and drawing less than 2W of power.
Further reading
Interconnect devices support PCI Express
PLX Technology is developing I/O interconnect devices based on the next-generation input/ou