News Release from: Parallel Systems
Edited by the Electronicstalk Editorial Team on 9 September 2002
Full design support for Xilinx Virtex-II Pro
Parallel Systems can provide full design support for Xilinx's new Virtex-II Pro devices.
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Parallel Systems can provide full design support for Xilinx's new Virtex-II Pro devices. The company distributes Aldec's mixed language simulators in the UK and Ireland. Because Virtex-II Pro devices contain an embedded processor, other low cost simulators cannot support these devices.
Aldec can support these devices because of its interface with Swift SmartModels Library.
Aldec support for Rocket I/O transceivers and PowerPC processors on a single chip is completely streamlined.
Aldec's verification tools fully support these high-capacity chips in the FPGA market and not only accelerate time-to-market, but offer industry-leading flexibility and premium cost efficacy.
Aldec offers the most comprehensive FPGA support for Xilinx's latest Virtex-II and Virtex-II Pro devices at the lowest price point on the market.
The combination of speed, flexibility and device density makes the latest release of the Virtex-II Pro devices invaluable to FPGA designers with complex designs.
"Device support of Aldec's product line is unparalleled", stated Megan Moran, Product Marketing Manager of Active-HDL.
"Many other verification tools that support Rocket I/O transceivers and PowerPC hard cores come at a much higher price point, which makes it a prohibitive solution for most FPGA designers.
Aldec's tools contain the SmartModel support necessary for Xilinx high-density devices and extend its support for embedded components as well".
Aldec's unique support for Virtex-II Pro devices comes from its Swift Model Support Interface.
By including the SmartModel Library in its simulation technology, Aldec's verification tools can automatically initialise the model in order to support the PowerPC component within its mixed simulation kernel.
Aldec's tools include precompiled wrappers for PowerPC and I/O components (PPC405 and GT design units) referring to the SmartModel Library.
The Swift model of the PowerPC can execute the processor code, enabling complete software verification along with the hardware.
Aldec's inclusion of SmartModel support provides the functional equivalency of all Virtex-II Pro hardware modules.
Simulation results for both the hardware and software may then be viewed in Aldec's Waveform Viewer and may even be graphically edited and back-annotated into the original code.
Simulation with Swift models is very accurate and includes all of the timing information regarding the actual device.
The designer can verify the bus behavior with timing accuracy.
The SmartModel interface is an API developed by Synopsys that allows behavioural models from the SmartModels Library to be directly imported within Aldec's verification tools.
Ordinarily, Virtex-II Pro devices cannot be simulated at the gate level because of the inclusion of embedded processors, so Aldec customers can instead use SmartModels representing integrated circuits and system buses as "black boxes" that accept input stimulus and respond with appropriate output behaviour.
Additionally, such behavioural models provide improved performance over gate-level models.
Aldec's tools allow the use of the SmartModels Library in VHDL, Verilog and mixed language designs and interface to this library through either a foreign architecture or the PLI routines.
The user can observe the internal registers of the CPU during the simulation and accurately debug any software problems discovered during the simulation.
Virtex-II Pro devices contain a foreign attribute string that associates a specific Smart Model with the PowerPC.
During initialisation of the simulation, the Smart Model Library interface is loaded automatically and the communication with PowerPC is established.
"Aldec verification tools continue to be on the cutting-edge in regards to support for the highest-density devices, as support for the new Virtex-II Pro devices through SmartModels illustrates.
That, in combination with our low price points, ensure that all FPGA designers have access to the most complete silicon solutions available", stated Megan Moran.
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